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[DynInst_API:] [dyninst/dyninst], Tim Haines, January 09, 2026
[DynInst_API:] [dyninst/dyninst] 0c1613: Display full instruction bytes in codeGen::format ..., Tim Haines, January 09, 2026
[DynInst_API:] [dyninst/dyninst] 0cfcf2: Preliminary work for AMDGPU codegen (#1987), Ronak Chauhan, January 12, 2026
[DynInst_API:] [dyninst/dyninst] 0ff95c: Don't run riscv instruction decode tests unless de..., Tim Haines, January 08, 2026
[DynInst_API:] [dyninst/dyninst] 1c1b86: Remove CLEAR_BITS, SET_VALUE, CHECK_WIDTH macros, ..., Ronak Chauhan, January 06, 2026
[DynInst_API:] [dyninst/dyninst] 1f54f7: Reformat emit-riscv64.C, wxrdnx, January 09, 2026
[DynInst_API:] [dyninst/dyninst] 21d361: Display full instruction bytes in codeGen::format, Tim Haines, January 09, 2026
[DynInst_API:] [dyninst/dyninst] 4030c4: Remove AST::hasCycle (#2094), Tim Haines, January 12, 2026
[DynInst_API:] [dyninst/dyninst] 420c9d: Remove mutable for _symtab_linkage, wxrdnx, January 12, 2026
[DynInst_API:] [dyninst/dyninst] 4532cb: Return number of bytes generated, wxrdnx, January 10, 2026
[DynInst_API:] [dyninst/dyninst] 52b778: Reformat RegisterConversion-riscv64.C, wxrdnx, January 08, 2026
[DynInst_API:] [dyninst/dyninst] 563cf9: Remove InputVariableAST, Tim Haines, January 11, 2026
[DynInst_API:] [dyninst/dyninst] 5a29ec: Remove invalid DataflowAPI AST types (#2095), Tim Haines, January 12, 2026
[DynInst_API:] [dyninst/dyninst] 5b79d0: Remove dangling pragma pop, wxrdnx, January 12, 2026
[DynInst_API:] [dyninst/dyninst] 840135: Cleanup Symbol class (#2088), kupsch, January 09, 2026
[DynInst_API:] [dyninst/dyninst] 85080f: Reformat arch-riscv64, wxrdnx, January 07, 2026
[DynInst_API:] [dyninst/dyninst] 87680a: Remove instructionAPI/InstructionTest.C (#2089), Tim Haines, January 10, 2026
[DynInst_API:] [dyninst/dyninst] 8b68ed: Also update inst-riscv64 and emit-riscv64, wxrdnx, January 10, 2026
[DynInst_API:] [dyninst/dyninst] 8c5061: Move AMDGPU codegen to ast.C with #ifdefs, Ronak Chauhan, January 09, 2026
[DynInst_API:] [dyninst/dyninst] 93de07: Refactor inst-riscv64.C, wxrdnx, January 07, 2026
[DynInst_API:] [dyninst/dyninst] 9f597e: Remove ARM ISA spec files, Tim Haines, January 08, 2026
[DynInst_API:] [dyninst/dyninst] a0842b: Rename to delete_bogus_edges, bbiiggppiigg, January 06, 2026
[DynInst_API:] [dyninst/dyninst] b004eb: Remove junk file, wxrdnx, January 12, 2026
[DynInst_API:] [dyninst/dyninst] c7d00c: Don't run riscv instruction decode tests unless de..., Tim Haines, January 09, 2026
[DynInst_API:] [dyninst/dyninst] d1388b: Remove AST::hasCycle, Tim Haines, January 11, 2026
[DynInst_API:] [dyninst/dyninst] d1b42c: cold clone symbols are not fncts, now type CODE, kupsch, January 05, 2026
[DynInst_API:] [dyninst/dyninst] d2a47a: Remove instructionAPI/InstructionTest.C, Tim Haines, January 08, 2026
[DynInst_API:] [dyninst/dyninst] dddd8c: Remove ARM ISA spec files (#2090), Tim Haines, January 09, 2026
[DynInst_API:] [dyninst/dyninst] df2b40: Add missing function implementation in RISC-V disp..., wxrdnx, January 01, 2026
[DynInst_API:] [dyninst/dyninst] e4f269: Add missing headers, wxrdnx, January 07, 2026
[DynInst_API:] [dyninst/dyninst] e88a41: Reformat DispatcherRiscv64 and add comment to expl..., wxrdnx, January 11, 2026
[DynInst_API:] [dyninst/dyninst] ea0b55: Reimplement signed unsigned multiplication, wxrdnx, January 01, 2026
[DynInst_API:] [dyninst/dyninst] ee9920: Remove CLEAR_BITS, SET_VALUE, CHECK_WIDTH macros a..., Ronak Chauhan, January 06, 2026
[DynInst_API:] [dyninst/dyninst] f75d49: Move public methods all to emit-riscv64.C, wxrdnx, January 09, 2026
[DynInst_API:] [dyninst/dyninst] f9b233: Remove junk space, wxrdnx, January 12, 2026
[DynInst_API:] [dyninst/dyninst] ffa25a: Prevent Transitive Edge Removal, bbiiggppiigg, January 01, 2026

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