SIGARCH-MSG: June 2003 Digest of SIGARCH Messages

["Doug Burger" <dburger@cs.utexas.edu>]

This is the June 2003 Digest of SIGARCH Messages (sigarch-jun03):

* New paper in Computer Architecture Letters
  http://www.comp-arch-letters.org
  Submitted by Kevin Skadron <skadron@cs.virginia.edu>


--Doug Burger
SIGARCH Information Director
infodir_SIGARCH@acm.org

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* New paper in Computer Architecture Letters

Computer Architecture Letters is pleased to announce the publication of
another paper online at our website, <http://www.comp-arch-letters.org>;
abstracts appear below.  The papers will appear in print in our next
paper issue.  The print issues are distributed to the entire IEEE
Computer Society TCCA membership, and e-mail notifications of newly
accepted papers are sent on a regular basis to the TCCA and ACM SIGARCH
memberships.

Paper:
R. Sendag, P.-f. Chuang, D. J. Lilja. "Address Correlation: Exceeding
the Limits of Locality." Volume 2, May 2003. 

The objective of Letters is to publish short (4-page), timely articles
of high-quality work.  We are very much aware of the long delays in our
field between submissions of manuscripts and their eventual appearance
in print.  We are doing something about that with this journal.  After
just over one year of operation, we have maintained an average
turnaround time from submission to author notification of just one
month, with an acceptance rate of 20%.

We encourage the community to continue submitting papers to Letters. 
Submissions are welcomed on any topic in computer architecture,
especially but not limited to: 
   - Microprocessor and multiprocessor systems 
   - Microarchitecture and ILP processors 
   - Workload characterization 
   - Performance evaluation and simulation techniques 
   - Compiler-hardware and operating system-hardware interactions 
   - Interconnect architectures 
   - Memory and cache systems 
   - Power and thermal issues at the architecture level 
   - I/O architectures and techniques 
   - Independent validation of previously published results 
   - Analysis of unsuccessful techniques 
   - Network and embedded-systems processors 
   - Real-time and high-availability architectures 
   - Reconfigurable systems 
The call for papers and instructions for submission can be found at
<http://www.comp-arch-letters.org>


Abstracts
---------

R. Sendag, P.-f. Chuang, D. J. Lilja. "Address Correlation: Exceeding
the Limits of Locality." Volume 2, May 2003. 

Abstract:
We investigate a program phenomenon, Address Correlation, which links
addresses that reference the same data. This work shows that different
addresses containing the same data can often be correlated at run-time
to
eliminate a load miss or a partial hit. For ten of the SPEC CPU2000
benchmarks, 57 to 99% of all L1 data cache load misses, and 4 to 85% of
all partial hits, can be supplied from a correlated address already
found
in the cache. Our source code-level analysis shows that semantically
equivalent information, duplicated references, and frequent values are
the
major causes of address correlations. We also show that, on average, 68%
of the potential correlated addresses that could supply data on a miss
of
an address containing the same value can be correlated at run time.
These
correlated addresses correspond to an average of 62% of all misses in
the
benchmark programs tested.

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