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SIGARCH-MSG: August 2001 Digest of SIGARCH Messages
Attached is the SIGARCH mailing list digest for August 2001
(grep sigarch-aug01):
* PACT'01: Parallel Architectures and Compilation Techniques
Particpation Call: http://www.ac.upc.es/pact01
* Asia-Pacific Computer Systems Architecture Conference (ACSAC'2002)
Paper Call: http://ciips.ee.uwa.edu.au/~morris/ACAC2002
* Conference on High Performance Computing (HiPC 2001)
Particpation Call: http://www.hipc.org
* Cache Performance for Selected SPEC CPU2000 Benchmarks
URL: http://www.cs.wisc.edu/multifacet/misc/spec2000cache-data
* Removing yourself from SIGARCH mailing list
--Mark D. Hill
infodir_SIGARCH@acm.org
SIGARCH Information Director
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Mark D. Hill Office 6373 CSS
Professor & Romnes Fellow Phone 608-262-2196
Computer Sciences Department Asstnt 608-265-3402
University of Wisconsin-Madison FAX 608-262-9777
1210 West Dayton Street E-mail markhill@cs.wisc.edu
Madison, WI 53706-1685 USA http://www.cs.wisc.edu/~markhill
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PACT'01: International Conference on
Parallel Architectures and Compilation Techniques
Barcelona, Spain. September 8-12, 2001
http://www.ac.upc.es/pact01
Dear colleague,
The 10th International Conference on Parallel Architectures and
Compilation (PACT'01) will take place in Barcelona (Spain), September
8-12, 2001.
We strongly suggest that you make your room reservations in advance.
Some of the hotels offered to PACT'01 delegates have the reservation
deadline close (during this month).
Conference: September 10-12
---------------------------
The conference program includes three outstanding keynote speakers:
- Randall D. Isaac (VP Science and Technology, IBM Research)
- Justin Rattner (Intel Fellow and Director of Microprocessor
Research Labs MRL)
- Joel Emer (Compaq Staff Fellow)
26 cutting-edge research papers organized in 9 Technical Sessions and
a special session on:
- Work in Progress: researchers are invited to submit abstracts
of new research and wild ideas by July 13th.
Before the conference, 2 tutorials and 5 workshops will be held on
September 8-9:
Workshops:
----------
Saturday, September 8th
- EWOMP'01 (full day). European Workshop on OpenMP (submission
closed, advance program available)
- WBT'01 (full day). Workshop on Binary Translation (submission
closed).
- MEDEA'01 (morning). Workshop on Memory Access Decoupled
Architectures (submission deadline: July 7, 2001).
Sunday, September 9th
- EWOMP'01 (full day). Continuation from previous day.
- COLP'01 (full day). Workshop on Compilers and Operating Systems
for Low Power (submission deadline: August 1, 2001).
- WUCC'01 (morning). Workshop on Ubiquitous Computing and
Communication (submission closed).
Tutorials:
----------
Saturday, September 8th (afternoon)
- 3G Wireless Infrastructure: Architecture, Algorithms,
and Applications. Allan Berenbaum, Nevin Heintze,
Stefanos Kaxiras and Girija Narlikar.
Sunday, September 9th (afternoon)
- The Design and Implementation of the Jalapeno JVM.
Michael Hind, IBM Research.
For additional information about the conference, the complete advance program
with information about the workshops and tutorials, registration and
accomodation, please vit the conference site located at:
http://www.ac.upc.es/pact01
Submitted by pact2001@ac.upc.es
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Asia-Pacific Computer Systems Architecture Conference
Call For Papers
The Asia-Pacific Computer Systems Architecture Conference (ACSAC'2002)
will be held at Monash University, Melbourne, Australia from 28 January
-
30 January, 2002. Original papers on all aspects of computer systems
architecture are invited, including, but not restricted to:
* arithmetic circuits
* processor design and architecture
* reconfigurable architectures
* instruction-level parallelism
* hardware support for operating systems and languages
* multiprocessor architectures
* interconnection networks
* software structures designed to utilise special hardware features
* operating systems
* embedded systems
* compilers
* virtual machines
All papers will be fully refereed. Full details of the conference are
available from
http://ciips.ee.uwa.edu.au/~morris/ACAC2002/index.html
In 2002, ACSAC'2002 is part of Australasian Computer Science Week -
a federation of five conferences covering a wide spectrum of topics
in Computer Science and Engineering.
This represents a great opportunity to visit Australia and interact with
the computer systems architects from "down-under" and the Asia-Pacific
region. Tennis fans should note that the Australian Open preceds the
conference in Melbourne. Don't languish is a northern hemisphere winter
when you could spend a few days on Australian beaches - or meet a
kangaroo
or koala! We may even resurrect the tradition of a day's sailing before
ACSAC if enough people show interest!
Feipei Lai, National Taiwan University (flai@cc.ee.ntu.edu.tw)
John Morris, University of Western Australia (morris@ee.uwa.edu.au)
Programme Committee Co-Chairs
Submitted by: John Morris <morris@ee.uwa.edu.au>
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HiPC 2001
8th International Conference on High Performance Computing
December 17-20, 2001
Hyderabad, India
http://www.hipc.org
===> Architecture-Related HIGHLIGHTS <=====
Program Chair: Burkhard Monien, Univ. Paderborn, Germany
Program Vice-Chairs:
Architecture: Allan Gottlieb, New York Univ. and NEC Research
Systems SW: Guang Gao, Univ. of Delaware
Applications: Horst D. Simon, Lawrence Berkeley National Lab.
Keynotes:
* William Gropp, Argonne National Laboratory
"Whither MPI: Lessons From and the Future of MPI"
* Vivek Sarkar, IBM T.J. Watson Research Center
"High-Performance Scalable Java Virtual Machines"
* Howard Jay Siegel, Colorado State University
"Heterogeneous Computing: Goals, Methods, and Open Problems"
Papers:
29 contributed papers from 18 countries, chosen from 108 papers
submitted in response to the call for papers. Contributed papers will be
presented in 5 sessions.
Workshops:
* Workshop on Cutting Edge Computing
* Workshop on Bioinformatics and Computational Biology
* Workshop on Embedded Systems
Tutorials:
* Itanium Architecture and Compiler Optimizations
* Opportunities and Challenges in Computational Biology
[City Tours: Tour 1 - December 20, 5:00 pm - 9:00 pm
Tour 2 - December 21, 8:00 am - 5:00 pm ]
Please check www.hipc.org/hipc2001/ for the full program and
travel information.
Potential attendees are encouraged to make travel plans ASAP.
Submitted by: Sriram Vajapeyam <sriram@cs.wisc.edu>
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Cache Performance for Selected SPEC CPU2000 Benchmarks
Jason F. Cantin and Mark D. Hill
University of Wisconsin-Madison
URL: http://www.cs.wisc.edu/multifacet/misc/spec2000cache-data
Version 1, Jul 2001
Abstract
The SPEC CPU2000 benchmark suite (http://www.spec.org/osg/cpu2000) is a
collection of 26 compute-intensive, non-trivial programs used to evaluate
the performance of a computer's CPU, memory system, and compilers. The
benchmarks in this suite were chosen to represent real-world applications,
and thus exhibit a wide range of runtime behaviors. On this webpage, we
present functional cache miss ratios and related statistics for selected
benchmarks in the SPEC CPU2000 suite. Version 1 present data for 11
benchmarks, with further updates forthcoming.
In particular, split L1 cache sizes ranging from 4KB to 1MB with 64B
blocks and associativities of 1, 2, 4, 8 and full. Most of this data
was collected at the University of Wisconsin-Madison with the aid of
the Simplescalar toolset (http://www.simplescalar.org).
Submitted by Mark D. Hill <markhill@cs.wisc.edu>
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Removing Yourself from SIGARCH Mailing List
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