Mailing List Archives
Mail Index
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
SIGARCH-MSG: September 2001 Digest of SIGARCH Messages
Attached is the SIGARCH mailing list digest for September 2001
(grep sigarch-sep01):
* Recent Removals from SIGARCH Mailing List
Submitted by Mark D. Hill <markhill@cs.wisc.edu>
* MICRO Workshop on Multithreaded Execution, Architecture and Compilation
Paper Call: http://www.cs.ucr.edu/~najjar/mteac5.html
Submitted by Dean Tullsen <tullsen@cs.ucsd.edu>
* MICRO Workshop on Feedback-Directed and Dynamic Optimization
Paper Call: http://www.microarch.org/fddo4
Submitted by Evelyn Duesterwald <Evelyn_Duesterwald@hp.com>
* HPCA Workshop on Network Processors
Participation Call: http://cis.poly.edu/haldun/wnp2002/
Submitted by Haldun Hadimioglu <haldun@photon.poly.edu>
* Removing yourself from SIGARCH mailing list
--Mark D. Hill
infodir_SIGARCH@acm.org
SIGARCH Information Director
----------------------------------------------------------------------
Mark D. Hill Office 6373 CSS
Professor & Romnes Fellow Phone 608-262-2196
Computer Sciences Department Asstnt 608-265-3402
University of Wisconsin-Madison FAX 608-262-9777
1210 West Dayton Street E-mail markhill@cs.wisc.edu
Madison, WI 53706-1685 USA http://www.cs.wisc.edu/~markhill
----------------------------------------------------------------------
Recent Removals from SIGARCH Mailing List
Mark D. Hill
About August 25th, dozens of names were removed from the SIGARCH
mailing list. ACM has not yet told me whether this was an attack or they
were removing names of those who had not renewed their SIGARCH membership.
For this reason, I will also forward this message to all I can determine
were removed.
----------------------------------------------------------------------
CALL FOR PAPERS
Workshop on
MULTITHREADED EXECUTION, ARCHITECTURE and COMPILATION
(http://www.cs.ucr.edu/~najjar/mteac5.html)
to be held in conjunction with the
34th International Symposium on Microarchitecture (MICRO-34)
Austin, TX. December 1-5, 2001
(http://www.microarch.org/micro34)
MTEAC-5 will be a one-day workshop with published proceedings
(Appologies if you receive multiple copies of this Call for Papers.)
OBJECTIVE AND SCOPE
The importance of multithreaded execution to both the high-end and
mainstream computing industries is rapidly increasing. The focus of
this workshop is on multithreading execution techniques and systems,
including architecture design and implementation, compilation
techniques, system and language support and performance evaluation.
TOPICS OF INTEREST
Topics of special interest include but are not limited to:
*speculative multithreading
*helper threads
*multithreaded embedded systems
PAPER SUBMISSIONS
Paper submissions and reviews will be done electronically. Authors are
requested to submit papers not to exceed eight pages single spaced
(including references, figures and tables) in Postscript or PDF. The
cover page should include the name of the authors, a brief abstract, a
list of 5 keywords and the full address of the corresponding author
(including surface mail address, telephone and fax numbers,and email
address).
Email papers to mteac5@cs.ucr.edu
IMPORTANT DATES
Paper submission: September 24. One week extension is granted without
making a special request. No further extensions will be granted.
Notification: November 9, 2001
Camera-ready papers due: November 16.
PROGRAM CO-CHAIRS
Antonio Gonzalez (antonio@ac.upc.es) U. Politecnica de Catalunya
Walid Najjar (najjar@cs.ucr.edu) U. of California Riverside
Dean Tullsen (tullsen@cs.ucsd.edu) U. of California San Diego
PROGRAM COMMITTEE
Wim Bohm, Colorado State University
Michel Dubois, University of Southern California
Guang Gao, University of Delaware
Sebastien Hily, Intel Corporation
David Kaeli, Northeastern University
Steve Keckler, The University of Texas at Austin
Artur Klauser, Intel Corporation
Mario Nemirovsky, Netmetrica Inc.
Yale Patt, The University of Texas at Austin
Eric Rotenberg, North Carolina State University
Andre Seznec, IRISA/INRIA
John Shen, Intel Corporation
Josep Torrellas, University of Illinois, Urbana-Champaign
Jordi Tubella, Universitat Politecnica de Catalunya
Mateo Valero, Universitat Politecnica de Catalunya
Theo Ungerer, University of Karlsruhe
Pen-Chung Yew, University of Minnesota
----------------------------------------------------------------------
CALL FOR PAPERS
We apologize if you receive multiple copies.
4th Workshop on Feedback-Directed and Dynamic Optimization
FDDO-4
In conjunction with MICRO-34
http://www.microarch.org/micro34
In cooperation with ACM SIGPLAN
Austin, Texas
December 2, 2001
http://www.microarch.org/fddo4
Sponsored by IEEE TC-MARCH and ACM SIGMICRO
This workshop provides a forum for the burgeoning fields of feedback-directed
and dynamic optimization. The goal of the workshop is to bring together researchers,
developers, and practitioners to encourage collaboration and the exchange of
ideas on recent progress and future directions. Contributions are sought on a
diversity of hardware and software topics including, but not limited to:
* Systems for dynamic compilation, binary translation, and continuous profiling
* New and innovative analyses, transformations, and intermediate
representations for dynamic and feedback-directed optimization
* Architectural and system support for dynamic and feedback-directed optimization
* Language extensions for dynamic and adaptive compilation
* Novel approaches to dynamic partial evaluation and program specialization
* Hardware and software mechanisms for low-cost performance monitoring
* Methods for supporting garbage collection, multithreading, and exceptions in
dynamic and feedback-directed systems
* Techniques for increasing the flow of information between hardware and software
* Performance evaluation of dynamic or feedback-directed optimization systems
* Experience with real feedback-directed systems and large, complex applications
Deadlines:
Paper submission: October 12, 2001
Notification of acceptance: November 5, 2001
Final version of papers due: November 23, 2001
Submission: Talks will be accepted on the basis of a short paper that will be
published within the workshop proceedings. Complete information on how to submit
papers will be provided at the workshop web site (http://www.microarch.org/fddo4).
Other questions should be directed to the workshop chairs.
Workshop Co-Chairs:
Tom Conte, NC State University (conte@ncsu.edu)
Evelyn Duesterwald, Hewlett-Packard Labs (evelyn_duesterwald@hp.com)
Program Committee:
Rastislav Bodik, University of Wisconsin
Brad Calder, University of California San Diego
Cristina Cifuentes, Sun Microsystems Labs
Michael Hind, IBM Research
Richard Johnson, Transmeta Corporation
Scott Mahlke, Hewlett Packard Labs
Sumedh Sathaye, IBM Research
Michael D. Smith, Harvard University
Ben Zorn, Microsoft Research
----------------------------------------------------------------------
Call for Participation
Workshop on Network Processors
http://cis.poly.edu/haldun/wnp2002/
Cambridge, Massachusetts
February 3, 2002
Held in conjuction with HPCA 8
8th International Symposium on High Performance Computer Architecture
February 2-6, 2002
http://www.eecg.toronto.edu/hpca8/
Organizers:
-----------
Patrick Crowley, University of Washington (pcrowley@cs.washington.edu)
Mark Franklin, Washington University in St. Louis (jbf@ccrc.wustl.edu)
Haldun Hadimioglu, Polytechnic University (haldun@photon.poly.edu)
Peter Z. Onufryk, IDT (peter.onufryk@idt.com)
Topics:
-------
A new distinct class of processors often referred to as network
processors, but also called communications processors, or packet
processors are emerging. They are fundamentally different from
those for general purpose computing. These processors are targeted at
communications applications such as routing, protocol analysis, voice and
data convergence, firewalls, VPNs, and QoS. The goal of this workshop is
to provide a forum for engineers and scientists from academia and industry
to discuss their latest research in the architecture, design, programming,
and use of these devices. We are especially interested in attracting new
or experimental techniques and approaches. Topics of particular interest
include, but are not limited to:
Architectures for network, communications, or packet processors
Packet classification
Search engines
Encryption and security
Compression
QoS
Voice processing and packet telephony
Software aspects of programming processors for networking
Benchmarking and performance analysis
Coprocessors such as CAMs and other support devices
Interfaces to high speed packet buses and switch fabrics
Techniques for accelerating network services
Novel applications
The workshop will consist of invited talks, paper presentations and a
panel session. A proceedings of the workshop will be provided to all
attendees and select papers will be published after the workshop.
Submissions:
------------
Please submit a one-page abstract in the pdf format for review to
haldun@photon.poly.edu.
Important Dates:
----------------
Abstracts due : October 26, 2001
Notification to authors : November 30, 2001
Final papers due: January 7, 2002
----------------------------------------------------------------------
Removing Yourself from SIGARCH Mailing List
If your email address exactly matches the email address
recorded on the SIGARCH list (no forwarding), you can
remove yourself with:
mail listserv@acm.org
with message body (not subject):
unsubscribe SIGARCH-MEMBERS
If your email address does *not* match, mail me at
infodir_SIGARCH@acm.org, and I will work to remove
you from the list.
----------------------------------------------------------------------
----------------------------------------------------------------------
[Other mailing list archives]
[CS Dept. Home Page]