Hello,
I think I may have found a bug in the save-caches/load-caches mechanism.
Here, I'm assuming a single-chip multicore environment.
I noticed that the state of cache does not get restored correctly
after load-caches. As far as I understand, the save-caches/load-caches
in ruby is implemented as follows:
1. Upon save-caches, all the caches are looked at and for lines that
aren't in I state, and the corresponding cache request (the request
that would've resulted in the current cache state) are recorded. These
requests are then compactly stored in some binary format.
2. Upon load-caches, the above saved records are fed back into the
caches, in a manner akin to the way ruby tester works (tester.exec).
The problem that I noticed is that save-caches looks only at the node
number of the chip, not the core.
CacheMemory::recordCacheContents() has the line
tr.addRecord(m_chip_ptr->getID(), m_cache[i][j].m_Address, Address
(0), ... );
m_chip_ptr->getID() is the same for all the cores in the chip, i.e.
with single-chip multicore, this value is always 0.
So, during load-caches, all the lines are fed back into core 0's cache
only.
I've confirmed this behavior by dumping the cache before save-caches,
and again after load-caches on a fresh simics environment. I see
roughly the same number of lines allocated, but only in core 0's cache
in the latter.
Am I missing something here? Is there an option that should be set to
correct this behavior?
Byn
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