Re: [Gems-users] Number of instructions executed in multi-core simulation


Date: Wed, 10 Mar 2010 11:38:17 -0600
From: sparsh mittal ISU <sparsh@xxxxxxxxxxx>
Subject: Re: [Gems-users] Number of instructions executed in multi-core simulation
Thanks for the prompt reply.


On Wed, Mar 10, 2010 at 11:33 AM, Dan Gibson <degibson@xxxxxxxx> wrote:
This sort of thing is very common and not at all unexpected. Different CPUs will observed different IPCs, because they execute different code.

E.g., idle loops and spin locks commit instructions much faster than, say, graph traversal.

Regards,
Dan

On Wed, Mar 10, 2010 at 11:29 AM, sparsh mittal ISU <sparsh@xxxxxxxxxxx> wrote:
Hello
I made a checkpoint configuration for abisko, using $num_cpus=2.
I ran the following the code:

instruction-fetch-mode instruction-fetch-trace
...(other steps for initialization)...
load-module ruby
ruby0.setparam g_NUM_PROCESSORS 2
ruby0.init

load-module opal
opal0.init
opal0.sim-start opaloutput
date ; opal0.sim-step 50000 ; date ;
ruby0.dump-stats file1;
Here is the part of the statistics I got:

instruction_executed: 141754 [ 50004 91750 ]
simics_cycles_executed: 4 [ 2 2 ]
cycles_per_instruction: 0.747591 [ 1.05966 0.577515 ]
misses_per_thousand_instructions: 4.59246 [ 7.4394 3.04087 ]

If I see the opal/system/system.C file, then the following loop in the function void system_t::simulate( uint64 instrCount )
while ( m_sim_status == SIMSTATUS_OK &&
          instrCount >= m_seq[0]->m_stat_committed[0] ) { ...}

it just takes into account the instructions committed in core 1 and not in core 2. So the core 2 has executed 91750, while core 1 has done (as expected) 50004 instructions.
Is the difference right(expected). If not, is  it possible that the instructions executed be quite close to 50000?

I would very much appreciate the explanation.



--
Thanks and Regards
Sparsh Mittal
Graduate Student
Electrical and Computer Engineering
Iowa State University, Iowa, USA

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http://www.cs.wisc.edu/~gibson [esc]:wq!



--
Thanks and Regards
Sparsh Mittal
Graduate Student
Electrical and Computer Engineering
Iowa State University, Iowa, USA
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