Date: | Wed, 10 Mar 2010 11:33:06 -0600 |
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From: | Dan Gibson <degibson@xxxxxxxx> |
Subject: | Re: [Gems-users] Number of instructions executed in multi-core simulation |
This sort of thing is very common and not at all unexpected. Different CPUs will observed different IPCs, because they execute different code. E.g., idle loops and spin locks commit instructions much faster than, say, graph traversal. Regards, Dan On Wed, Mar 10, 2010 at 11:29 AM, sparsh mittal ISU <sparsh@xxxxxxxxxxx> wrote: Hello -- http://www.cs.wisc.edu/~gibson [esc]:wq! |
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