Re: [Gems-users] How to config memory system

[Dan Gibson <degibson@xxxxxxxx>]

1. In rubyconfig.defaults, there are 17 configuration variables affecting the MemoryController. Read the comments. 
2. The number of memory controllers will depend on your topology.

Regards,
Dan

2010/4/6 张轶 <zhangyi@xxxxxxxxxxxxxx>

Hi Dan,

 

Thanks for your help. But unfortunately, I am still not clear how to configure the memory controller.

1)In the rubyconfig.defaults, there is no configurations for the memory controller/channel. So how to assign which address bits to denote channels?

 

2)My system is configured with MOSI_SMP_bcast_m protocol, 2 processors. The other settings are followed by rubyconfig.defaults. BANKS_PER_RANK: 8, RANKS_PER_DIMM: 2, DIMMS_PER_CHANNEL: 2 ....

In the memorycontrol instantiation, I have added an random function, and through the data printed out, I suppose there should be two memory controllers/channels, thus there would be totally 64 banks, doubles of 32.

But through typing command dump-stats, I could only read 32 banks, namely half statistics.

So, why?

 

Any advice will be appreciated!

 

Zhang Yi

 

 

------------------ Original ------------------

From:  "Dan Gibson"<degibson@xxxxxxxx>;

Date:  Sat, Apr 3, 2010 10:43 PM

To:  "Gems Users"<gems-users@xxxxxxxxxxx>;

Subject:  Re: [Gems-users] How to config memory system

 

1. The number of memory controllers is a function of the network topology. They appear in the topology as "Directory Memory" objects. This is true regardless of whether you happen to be using a 'CMP' or 'SMP' protocol.
2. Memory controllers are shared by all processors.
3. In GEMS, Memory Controller = Memory Channel.

Bonus extra response: Only protocols that end in _m actually use a realistic memory controller. All other protocols just assume memory has a fixed latency.

Regards,
Dan

2010/4/3 张轶 <zhangyi@xxxxxxxxxxxxxx>

Hi, all

Currently, I am using GEMS 2.1 to perform simulation andhavesome confusions on memory configs:

1. I am wondering, inGEMShow to set the numbers ofmemory controllerfor CMP and SMP system? Isit the same in both CMP and SMP?

2. Will memory controller be shared by all processors?

3.Is memory controller the same thingto memory channels?

Many thanks for your help!

Zhang Yi

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