Date: | Sat, 18 Oct 2008 02:01:53 -0400 |
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From: | "Carole-Jean Wu" <carolewu@xxxxxxxxxxxxx> |
Subject: | [Gems-users] cache reference and its associated processor id |
Hello,
I have a 16-core CMP system setup with private L1 caches and a shared L2 cache, and I would like to have information about which core a memory reference in L2 is issued. Does anyone know how I can get this information? Even knowing how to get the m_version of the associated L1's sequencer will help. Thanks in advance! Carole |
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