Re: [Gems-users] ruby results

["Dave Z." <zhu_dave@xxxxxxxxx>]

--- Luke Yen <lyen@xxxxxxxxxxx> wrote:

> Hi,
> 
> > So, I draw two conclusions: First, it's not
> possible
> > to simulate more than 1 processor per chip using
> SMP
> > protocols. So, I can't get ruby results based on
> per
> > processor as long as I use MOESI_SMP_hammer or any
> SMP
> > protocol. I would like to simulate a dual-core
> > machine, similar to dual-core AMD Opteron. That's
> why
> > I'm using MOESI_SMP_hammer. Second, I still don't
> 
>      If you want to model a shared L2 cache like our
> CMP protocols you
> have to use different cache mapping functions and
> different virtual
> network connections.  It might be easier to try to
> split up the file into 2
> different files, one controlling the L1 and one
> controlling the L2 (like
> for our CMP protocols).
> 
>     Otherwise if you want to model private L1 and L2
> caches I believe you
> just use the standard-CMP file instead of
> standard-SMP file in the .slicc
> file for the protocol to get rid of the assertion
> error.

I use the standard-CMP file instead of the
standard-SMP file in MOESI_SMP_hammer.slicc, but I
still get the assertion error. Am I missing something?

Thank you.

D.


> 
> > understand why my results are always zero for the
> > second processor.
> >
>      Alot of our profiling functions take in
> machineID numbers, so make
> sure the right number is passed in for the right
> processor.  You can also
> look at the generated SLICC code to help see this.
> 
>   Luke
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> 


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