Mailing List Archives

Authenticated access

 		[Computer Systems Lab]

[← Prev]  [Date]  [Next →] [← Prev]  [Thread]  [Next →]

[DynInst_API:] [dyninst/dyninst] 661884: Rewrite shifts and constants in RISC-V codegen

Date: Sun, 02 Feb 2025 13:29:09 -0800
From: wxrdnx <noreply@xxxxxxxxxx>
Subject: [DynInst_API:] [dyninst/dyninst] 661884: Rewrite shifts and constants in RISC-V codegen 
  Branch: refs/heads/angushe/riscv
  Home:   https://github.com/dyninst/dyninst
  Commit: 661884a94a8c1918b06ace4f8480f345d1da79ec
      https://github.com/dyninst/dyninst/commit/661884a94a8c1918b06ace4f8480f345d1da79ec
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2025-02-02 (Sun, 02 Feb 2025)

  Changed paths:
    M common/src/arch-riscv64.h
    M dyninstAPI/src/codegen-riscv64.C
    M dyninstAPI/src/codegen-riscv64.h

  Log Message:
  -----------
  Rewrite shifts and constants in RISC-V codegen



To unsubscribe from these emails, change your notification settings at https://github.com/dyninst/dyninst/settings/notifications
[← Prev in Thread] Current Thread [Next in Thread→]
  • [DynInst_API:] [dyninst/dyninst] 661884: Rewrite shifts and constants in RISC-V codegen, wxrdnx <=
Previous by Date:  [DynInst_API:] [dyninst/dyninst] 945f3c: Update flag and segment registers, Tim Haines
Next by Date:  [DynInst_API:] [dyninst/dyninst] 1cbe90: Fix wrong indexing order in INSN_SET, wxrdnx
Previous by Thread:  [DynInst_API:] [dyninst/dyninst] 65bc63: Add conditional branch, wxrdnx
Next by Thread:  [DynInst_API:] [dyninst/dyninst] 6a0257: Update sha1.C: #include <cstdint> (#1880), Frank Ch. Eigler
Indexes:  [Date] [Thread]