[DynInst_API:] [dyninst/dyninst] 25ad35: improve intel instruction & operand formatting (#1...


Date: Tue, 25 Jul 2023 11:12:13 -0700
From: kupsch <noreply@xxxxxxxxxx>
Subject: [DynInst_API:] [dyninst/dyninst] 25ad35: improve intel instruction & operand formatting (#1...
  Branch: refs/heads/master
  Home:   https://github.com/dyninst/dyninst
  Commit: 25ad35c6762df4c40c68bd2fc3f6428efbd45a28
      https://github.com/dyninst/dyninst/commit/25ad35c6762df4c40c68bd2fc3f6428efbd45a28
  Author: kupsch <kupsch@xxxxxxxxxxx>
  Date:   2023-07-25 (Tue, 25 Jul 2023)

  Changed paths:
    M instructionAPI/src/ArchSpecificFormatters.C
    M instructionAPI/src/Operand.C

  Log Message:
  -----------
  improve intel instruction & operand formatting (#1463)

This fixes three issues when formatting an x86_64 instruction or its
operands:

1) Fix the order of operands when formatting the instruction to be the
   AT&T syntax order.  If the instruction had three or more operands.
   Conversion from the internal (Intel) order rotated right by 1 instead
   of reversing the operands.

2) Eliminate special treatment of register %kN as the first operand as
   mask registers in Instruction::format as Operand::format already
   formats these as masks (enclosed in braces) and not all uses of mask
   registers are as a mask.

3) Fix Operand::format to produce the correct disassembly operand
   string.  The formatting of the internal Expression needs to be done
   for some indirect values.  This was done in the Instruction::format
   instead of directly in Operand::format

* x86Formatter::getInstructionString - fixes 1, 2, 3

* Operand::format - fixes 3

* x86Formatter::formatRegister - cleanup, remove malloc that could leak


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