[DynInst_API:] [dyninst/dyninst] 5c210a: Semantics for shift instruction.

[Sunny Shah <shah28@xxxxxxxx>]

  Branch: refs/heads/arm64/feature/semantics
  Home:   https://github.com/dyninst/dyninst
  Commit: 5c210a53c0a5924e48c583e2f04722b2be9beb2a
      https://github.com/dyninst/dyninst/commit/5c210a53c0a5924e48c583e2f04722b2be9beb2a
  Author: Sunny Shah <shah28@xxxxxxxx>
  Date:   2016-12-20 (Tue, 20 Dec 2016)

  Changed paths:
    M dataflowAPI/rose/semantics/DispatcherARM64.C
    M dataflowAPI/rose/semantics/DispatcherARM64.h

  Log Message:
  -----------
  Semantics for shift instruction.

Includes semantics for the following instructions:
* LSL (register)
* LSLV
* LSR (register)
* LSRV
* ASR (register)
* ASRV
* ROR (register)
* RORV

Introduced method DispatcherARM64::ShiftReg that is utilized by the
semantics of all the above instructions and calls the appropriate shift
function under BaseSemantics::RiscOperators based on the shift type.

Introduced method DispatcherARM64::getShiftType that is again used by
the semantics code to determine the type of shift.