Re: [pl-seminar] Seminar: Adrian Sampson on Accelerator Design Languages

[Aws Albarghouthi <aws@xxxxxxxxxxx>]

Reminder: This is tomorrow, Friday.

On Tue, May 19, 2020 at 2:44 PM Aws Albarghouthi <aws@xxxxxxxxxxx> wrote:

Hello,

We are beginning our summer virtual seminar series. Our first speaker is Adrian Sampson (Cornell),

who will be speaking this Friday, May 22, at 10am (see link below) The talk is at the intersection of PL and architecture.

Architecture folks: please forward to students.

title: Accelerator Design Languages

abstract:
We need to make it easier to design custom accelerators, especially for reconfigurable hardware (i.e., FPGAs). The current mainstream options are hardware description languages (HDLs), which are low-level languages that make it feel like youâre wiring up a circuit by hand, and high-level synthesis (HLS) tools, which compile legacy software languages like C or C++ to an HDL.

The thesis of this talk is that better alternatives are possible. Perhaps unsurprisingly, we find that the semantic chasm between C++ and hardware circuits comes with myriad correctness and performance pitfalls. We advocate instead for more research on accelerator design languages: programming models that maintain computational semantics while not attempting to shield developers from thinking about hardware. Our lab is working on a programming language, Dahlia, that uses a type system to restrict HLS programs to a subset with predictable semantics and performance. Based on Dahlia, we are designing a compiler infrastructure to support the construction of new accelerator design languages.

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Aws

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Aws