[pl-seminar] FW: Summer internships and Job opening at NEC Labs

["Thomas Reps" <reps@xxxxxxxxxxx>]

Here is an announcement about opportunities at NEC labs.
The person to contact is

Aarti Gupta
NEC Labs America                                Email:
<mailto:agupta@xxxxxxxxxxxx> agupta@xxxxxxxxxxxx
4 Independence Way, Suite 200              Phone: +1 609 951-2966
Princeton, NJ 08540                               Fax: +1 609 951-2483
 
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Summer Internships in Verification Group, NEC Labs America
 
Summer internship positions are available for graduate students, in the
Verification group at NEC Laboratories America, in Princeton, New
Jersey.
 
Our group is currently working on a software verification platform
called F-Soft, which utilizes accurate bit-level modeling of program
behavior, and light-weight static analysis techniques. The back-end
verification in F-Soft is performed by DiVer, a formal verification
platform developed by our group. DiVer comprises many symbolic model
checking techniques based on efficient engines like SAT solvers and
BDDs, and has been applied successfully for verification of several
large hardware designs from the industry. The current activity in both
these projects offers a wide range of interesting topics for research,
including software modeling, static program analysis, model checking,
abstraction-refinement, constraint solvers (SAT solvers, SMT solvers,
BDDs). 
 
More information about the Verification group and NEC Labs can be found
at http://www.nec-labs.com. Interested students can send their resume
and a short description of research interests to Aarti Gupta
(agupta@xxxxxxxxxxxx <mailto:agupta@xxxxxxxxxxxx> ).
 
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Associate Research Staff Member (ARSM) position in Verification Group
 
The Verification group at NEC Laboratories America, in Princeton NJ, is
seeking an experienced engineer to help develop and maintain
verification projects. The group is currently engaged in research and
advanced technology development in the areas of software program
verification (F-Soft project) and hardware design verification
(DiVer/VeriSol project). These projects span a wide range of interesting
topics - software modeling and abstraction, static program analysis,
model checking, hardware design and verification methodologies,
constraint solvers (SAT solvers, BDDs). Candidates are expected to be
highly motivated and innovative in translating high-level ideas on these
topics, into detailed software designs and source code. They are also
required to have strong system-building skills, with hands-on experience
in designing, debugging, and maintaining large software systems.
 
The ongoing group projects provide numerous opportunities for an ARSM to
participate in research and development activities.  Specifically,
he/she is expected to contribute to the following tasks: 

*	
	Develop source code and engineering solutions for sub-projects 
*	
	Perform experimental evaluations and organize experimental data
*	
	Tune project source code and solutions for performance and
memory optimizations 
*	
	Maintain the source code repository, support the build process,
support compiler/debugger upgrades
*	
	Support tool releases, including tool documentation (release
notes, manuals etc.)

Required Education/Experience: Master's degree in Computer Science, or
equivalent experience

Required Skills: 

*	
	Proficiency in programming languages (C/C++/Java), scripting
languages (perl/awk)
*	
	Proficiency in use of compilers, debuggers, build tools (gnu/MS)
on standard platforms (Unix/Linux/Windows)
*	
	Strong understanding of data structures and algorithms
*	
	Basic understanding of verification methods (formal
verification, testing, simulation)
*	
	Hands-on experience in design, implementation, and maintenance
of software systems
*	
	Good verbal and written communication skills
*	
	Good team work and people skills

Bonus Skills:

*	
	Familiarity with development or application of model checking
tools, static analysis tools
*	
	Familiarity with program analysis and compiler techniques
*	
	Familiarity with HDLs (Verilog/VHDL/SystemC/SystemVerilog)
and/or EDA tools

More information about the Verification Group and NEC Labs can be found
at http://www.nec-labs.com. Interested applicants can send their resume
to Aarti Gupta (agupta@xxxxxxxxxxxx).