Re: [Gems-users] Cache Coherence Power in Opal/WATTCH

[Ragavendra <natar@xxxxxxxxxx>]

 On 09/27/2010 02:32 PM, Greg Byrd wrote:
> I don't know the answers to your questions, but you will at least need 
> to say which coherence protocol you are using.
> ...Greg
>
>
> On 9/27/2010 3:22 PM, Ragavendra wrote:
> > Hello,
> >
> > I have a couple of questions regarding how power consumed due to
> > cache coherence operations is accounted for in Opal. I searched the
> > mailing list prior to posting and did not find any thread on this
> > topic. I hope I'm not repeating any question.
> >
> > The power.C file in opal/power/ includes extra bits in the tag of a
> > cache line for power calculations:
> >
> > tcolsb = a * (tagsize + 1 + 6) * ntspd/ntwl;
> >
> > I'm assuming 6 bits are for the state information and 1 is for the
> > owner information stored in each cache line. Is this correct? The 7
> > extra bits are added to both L1 and L2 cache tags, although the L1
> > cache lines don't have as many states or owner information. Does this
> > overestimate the power consumed?
> >
> > Also, where is the information about L1 sharers kept in L2 cache? I
> > did not find any change in the tag or data fields of L2 cache to
> > account for this. Where is the power consumed by these bits counted?
> _______________________________________________
> Gems-users mailing list
> Gems-users@xxxxxxxxxxx
> https://lists.cs.wisc.edu/mailman/listinfo/gems-users
> Use Google to search the GEMS Users mailing list by adding 
> "site:https://lists.cs.wisc.edu/archive/gems-users/"; to your search.
I'm using the MSI_MOSI_CMP_directory protocol. The simulated system is a 
CMP machine with one 4-core processor.
I'm trying to calculate the power consumed by cache coherence operations 
alone. As a first step I'm trying to understand how exactly power is 
calculated in Opal. Currently I am not using Opal in my simulations.
--
Ragavendra Natarajan,
Dept. of Computer Science and Engineering
University of Minnesota, Twin Cities
Minneapolis, MN