[Gems-users] Debugging Topology and Network ports

[Edward Lee <edwl202@xxxxxxxxx>]

Hi all,

I am using MOESI_SMP_directory protocol with 16 processors and doing
some tests with the 4x4 MESH topology. While debugging using the
tester I realized that the network generates components between 0..79.
I assume the following distribution:

0-15 for L1 caches
15-31 for directories
64-79 for main routers that connect different processors

However, I am doubtful for the rest of the numbers, 32-47 and 48-63.
Are they representing the L1 caches and directories again but for the
reverse direction?

Also, when I get the debug output for little.trace:

7 0x400 0 LD
1 0x400 0 LD
8 0x400 0 LD
12 0x400 0 ST
1 0x400 0 LD

I saw some debugging info such as:

[Queue to Throttle 7 3] with arrival_time 8 cur_time: 7 --> I think
this comes from PerfectSwitch latency of 1 cycle, 7 refers to m_sID in
the code and 3 refers to m_node. I also tried gdb but I couldn't go
any further on the debugging to understand why we go Throttle between
7 and 3 (this is what I assume to be true from the naming) while on
the next the message actually goes to switch 6 (as can be seen in the
next line)

[Queue from port 6 4 0 to PerfectSwitch] with arrival_time 12
cur_time: 8 --> I think this refers to link_latency of 4. Further, 6
refers to m_switch_id, 4 refers to port, and 0 refers to j. So what do
port and j refer to here? I think it is related to input port
m_in[port][j] but my question is how does this 2d array numbering
associate with the initial 80 points in the topology?

Also, as I follow the debug output it goes like 7-6-5-1-0, shouldn't
this be 7-6-5-4-0? (assuming we are fetching memory block 0x400 from
the memory at proc0)

Without going any further let me pause here for asking some help in
debugging the generated MESH topology and clarifying my confusions.
Any input is appreciated.

Thanks,

Ed