Date: | Wed, 24 Feb 2010 14:36:36 -0600 |
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From: | Dan Gibson <degibson@xxxxxxxx> |
Subject: | Re: [Gems-users] Tarcking L2 access in L2directory-sm |
Messages arrive at L2s when that L2 does not (yet) cache the particular block (e.g., an L2 cache miss). When you execute L2cacheMemory[addr], there is an assertion that the line is present. If the line is not present, L2cacheMemory[addr] is meaningless. Hence, you cannot assume in your implementation of cal_act_Time() that the addresses associated with each message resides in-cache without first checking that this is the case. Regards, Dan On Wed, Feb 24, 2010 at 2:20 PM, Muhammad Shoaib <shoaibbinalt@xxxxxxxx> wrote:
-- http://www.cs.wisc.edu/~gibson [esc]:wq! |
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