Re: [Gems-users] how to trace the real memory access info

[Polina Dudnik <pdudnik@xxxxxxxxx>]

Xing,

The two actions I mentioned are not necessarily exactly what you need. You would have to take a closer look to figure out which one you actually need. The way you would add a callback into directory memory is as follows:

1. Find the file called DirectoryMemory.[hC], add your function there (expl. void incrementMemAcc()).
2. Find declaration of DirectoryMemory in MOESI mem file and add the declaration of the same function there.
3. Declare an action that invokes your new function. 
4. Put that action in appropriate transitions.

Let me know how it goes.

Polina

On Fri, Apr 2, 2010 at 12:42 AM, Xing Zhang <zxj.xing@xxxxxxxxx> wrote:

Hi Polina,

Thank you for reply.

The protocol file i'm using is MOESI_CMP_directory_m.slicc. and in MOESI_CMP_directory_m-dir.sm, there does exist actions called qf_queueMemoryFetchRequest and d_sendDataMsg.

But i'm not very familiar with GEMS now, could you please tell me how to add some callbacks in DirectoryMemory to trace memory access?

Thank you again.

Xing

2010/4/1 Polina Dudnik <pdudnik@xxxxxxxxx>

You would have to do it in the coherence protocol. For example, take a look at MESI_CMP_directory-mem.sm. You will find there things like:

  transition(I, Fetch, IM) {
    qf_queueMemoryFetchRequest;
    e_ownerIsRequestor;
    j_popIncomingRequestQueue;
  }

This means that a memory fetch is issued.

  transition(IM, Memory_Data, M) {
    d_sendData;
    l_popMemQueue;
  }

This means data came back from memory.

You can look inside qf_queueMemoryFetchRequest and d_sendData and insert some sort of callback in DirectoryMemory for example.

Polina

On Thu, Apr 1, 2010 at 1:54 AM, Xing Zhang <zxj.xing@xxxxxxxxx> wrote:

Hi there,

I want to get memory  access trace from GEMS to feed DRAMsim, a memory simulator. And i did it by adding code to ruby_operate function in   $GEMS/ruby/module/ruby.c. This function is called once for every memory operation. But i found it my code catches every request that cpu send to cache, not to memory after cache miss.

What i really want to get is the memory access between cache and memory after cache miss,  the request send to memory, not to cache. Dose anyone know how to do it?

Thanks in advance.

Xing 
 

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