Re: [Gems-users] Zero L2 misses

[Arkaprava Basu <basu@xxxxxxxxxxx>]

Dear Rakesh,

            I have not worked with this particular protocol, so don't 
know exact fix. I think only solution is to try out things.. use grep to 
 find out where these declarations are for other protocols..where they 
should be in this protocol... Sorry for being too vague, but I don't 
have specific information. But I do feel fixing compilation problem of 
this type, should be doable.
Thanks
Arka


Rakesh Komuravelli wrote:
> Hi Arka,
>
> Thanks for the reply. I get compilation error when I uncomment that line.
> Looks like I also need to uncomment the definition of the
> function convertToGenericType() in MESI_SCMP_bankdirectory-msg.sm. But I get
> compilation error saying,
>
> ../protocols/MESI_SCMP_bankdirectory-msg.sm:119: Error: Type
> 'CoherenceRequestType' does not have enumeration 'PUTS'
>
> The declaration of CoherenceRequestType is in the same
> file, MESI_SCMP_bankdirectory-msg.sm, and there is no entry for 'PUTS' in
> the enum declaration. So, if I comment the lines for undeclared types, it
> works. But I was looking at other protocol files, say for e.g.,
> MESI_CMP_directory. MESI_CMP_directory-msg.sm has the same declaration for
> CoherenceRequestType as in MESI_SCMP_bankdirectory-msg.sm, but I don't get
> the above error when I compile ruby for MESI_CMP_directory even though the
> convertToGenericType() uses types that are not declared in the same file.
> Looks like it is pulling these other types from somewhere else. Any idea on
> what should I do to get it working for MESI_SCMP_bankdirectory?
>
> Thanks,
> Rakesh
>
> On Thu, Nov 12, 2009 at 5:27 PM, Arkaprava Basu <basu@xxxxxxxxxxx> wrote:
>
> > Dear Rakesh,
> >
> >           I think the profiling for L2 cache miss is turned off for
> > that particular protocol ( not sure why though). So I think the quick
> > fix is to go MESI_SCMP_bankdirectory-L2cache.sm and in the
> > action(uu_profileMiss, "\u", desc="Profile the demand miss" ) ,
> > *uncomment* the line that starts with profile_L2Cache_miss .
> >
> > I think this will resolve the issue.
> >
> >
> > Thanks
> > Arka
> >
> >
> > Rakesh Komuravelli wrote:
> > > Hi,
> > >
> > > I see L2 misses to be zero in the Ruby dump-stats. All other entries
> > under
> > > L2_cache cache stats are zero too. This is for MESI_SCMP_bankdirectory
> > > protocol. I do see L1 D cache stats but I don't see any L1 I cache stats
> > > because I am not loading Opal. The versions and other parameters I am
> > using
> > > are as follows:
> > >
> > > Versions:
> > > simics 3
> > > gems 2.1.1
> > >
> > > Simics commands before loading ruby:
> > > instruction-fetch-mode instruction-fetch-trace,
> > > istc-disable,
> > > dstc-disable,
> > > cpu-switch-time 1
> > >
> > > Ruby commands:
> > > ruby0.setparam g_NUM_PROCESSORS 16,
> > > ruby0.setparam g_PROCS_PER_CHIP 16,
> > > ruby0.setparam g_MEMORY_SIZE_BYTES 268435456,
> > > ruby0.setparam g_NUM_L2_BANKS 16,
> > > ruby0.setparam g_NUM_MEMORIES 16,
> > > ruby0.setparam NUMBER_OF_VIRTUAL_NETWORKS 5,
> > > ruby0.setparam_str g_CACHE_DESIGN NUCA,
> > > ruby0.setparam_str g_NETWORK_TOPOLOGY FILE_SPECIFIED,
> > > ruby0.setparam g_DATA_BLOCK_BYTES 64,
> > > ruby0.init
> > >
> > > Any help is greatly appreciated.
> > >
> > > Thanks,
> > > Rakesh
> > >
> > >
> > >
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