Hi,
I want to set parameters of DDR MemoryControl in rubyconfig.defaults. How
can I consider the effect of processor' frequency (assuming 3.0 GHz) in
number of clock cycles in memory access?
I think I should update the MEM_BUS_CYCLE_MULTIPLIER parameter. If it is
wrong please correct me.
The description of this parameter is as follows:
Basic cycle time of the memory controller. This defines the period which
is used as the memory channel clock period, the address bus bit time, and
the
memory controller cycle time. Assuming a 200 MHz memory channel (DDR-400,
which has 400 bits/sec data), and a 2 GHz Ruby clock:
What is 2GHz Ruby clock? Is it processor frequency?
Do I need to update any other parameters to consider proc's freq?
Thanks,
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