Ken,
The cache line can be modified (dirty) when the transaction starts.
Fwd_GETS_T events happen if the block has been read in the
transaction, but not written (the 'write' bit is false). So, no, the
write bit is not always set when the cache entry is in the MM state.
--Kevin
On Oct 2, 2007, at 10:10 PM, cge@xxxxxxxx wrote:
Hi,
in the MOESI SMP LOGTM directory cache protocol(version 1.3), there is
a following transition:
transition(MM, Fwd_GETS_T, O) {
e_sendData;
l_popForwardQueue;
}
Since Fwd_GETS_X event will be generated instead of Fwd_GETS_T if the
cache entry's
m_write field is false, the above transition seems to imply that a
cache entry can be in
a MM state with the m_write field to be false.
Is a cache entry's m_write always true if the cache entry is in MM
state because MM
means the entry is dirty and locally modified?
Thanks,
Ken
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