Re: [Gems-users] TILED_Procs-16_ProcsPerChip-16_L2Banks-16_Memories-16.txt

[Mike Marty <mikem@xxxxxxxxxxx>]

Niket Agarwal wrote:
> Hi all,
> In the network file for the TILED processors, released recently, the 
> directories are placed near the nodes 0, 3, 10 and 15. Is there any 
> rationale behind this ? (see below for the network file)
>   
I placed them on the edges of the chip.

> Also, the network file depicts that the nodes are connected in a tiled 
> fashion. Can't the network topology be modified?
>   
Yes, modify the topology however you want.  You can replaced the "TILED" 
prefix with your own specification.  Then change the g_CACHE_DESIGN 
parameter in $GEMS/ruby/config/rubyconfig.defaults to match your new prefix.
--Mike