Re: [Gems-users] MOESI_CMP_directory

["Dave Z." <zhu_dave@xxxxxxxxx>]

The problem was with the component I added. I fixed it. Thanks.

----- Original Message ----
From: Mike Marty <mike.marty@xxxxxxxxx>
To: Gems Users <gems-users@xxxxxxxxxxx>
Sent: Friday, December 7, 2007 11:49:32 AM
Subject: Re: [Gems-users] MOESI_CMP_directory

The question is how the L1Cache went to state I without the L2Cache transitioning to state M.

Can you get a trace many thousand cycles in advance? 

--Mike

On Dec 7, 2007 1:45 PM, Dave Z. < zhu_dave@xxxxxxxxx> wrote:

I added a new component to the protocol but the debug trace doesn't show any operation related with that component on that cache line. Here is the debug trace for the slicc protocol:

1945300   0  -1        Seq               Begin       >       [0xd89b9f40, line 0xd89b9f40] 

1945312   0   0    L1Cache                Load      I>IS     [0xd89b9f40, line 0xd89b9f40] 

1945398   0   1    L2Cache             L1_GETS    ILX>IFLOXX [0xd89b9f40, line 0xd89b9f40] 

Then, the invalid transition error shows up.

Dave

----- Original Message ----
From: Mike Marty < mike.marty@xxxxxxxxx>
To: Gems Users <gems-users@xxxxxxxxxxx>
Sent: Friday, December 7, 2007 11:17:44 AM
Subject: Re: [Gems-users] MOESI_CMP_directory

Did you modify the protocol in any way?  Can you generate a trace leading up to the error and grep on 0xd89b9f40?  To do so, execute the command 'ruby0.debug-start-time "1940000"

--Mike

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