[Gems-users] L1 miss breakdown

[mehmetderin.harmanci@xxxxxxx]

   Hello all,

      I'm trying to understand the MSI_MOSI_CMP_directory protocol. My main
   objective is actually to have a breakdown of L1 misses, the breakdown
   being local L2 hit, remote L2 hit and on-chip miss (off-chip hit).  I
   assume all L2 misses correspond to on-chip misses, however to distinguish
   if an L2 hit is local or remote I need to figure out at what points
   exactly an L2 hit occur. I took the following path but it did not help
   me too much. I found out all the actions pf L2 cache controller where the
   DataBlk is read from the L2 cache directly (as if the data was already
   in the L2 cache and it was found in the cache). However there are about
   ten of these functions and I'm a little bit lost in the protocol to
   understand what they do exactly. Is there a way to filter out these
   functions (i.e. to figure out which correspond to actual L2 hits)? Or
   I should look transition by transition to figure out the actual hits?
   Does anybody have an idea how to do the breakdown, if the above is too
   complicated? I'll really appretiate any help, since I've been working on
   this for quite a time and I do not find a way yet.

      Thanks,

        Derin Harmanci.