Re: [Gems-users] question about simics clock frequency

[Mike Marty <mikem@xxxxxxxxxxx>]

> I use simics with Ruby only that simulates a 2 core CMP architecture.
> I change the simics clock frequency from 20Mhz to 2048Mhz, the results of L2 misses per processor are quite different.
> The cpu-switch-time is set to be 1.
> I am wondering how cpu clock frequency affects the cache accesses flow?
>

Simics will probably generate a different code path because of things
like the RTC (real-time clock) interrupt.

--Mike