dear sir,
Opal models a
dynamically-scheduled SPARC v9 processor and uses Simics to verify its
functional correctness.
first question,
i want use Opal as a timing
simulator/module worked with simics to verify/evaluate my
micro-architectural innovations.
if my goal processor
module,which is multi-processor core in a chip and multi-threading and
so on, is different from Opal's micro-architectural module ,
can i change Opal's micro-architectural module to my own processor
module? is it possible? of course my own processor module is sparc
v9-based.
secend,
Opal
doesn't use Simics' MAI interface so far. may opal do it in future?
and may it be usefull for my own micro-architectural module?
thanks very much!
thanks again!
regards
wangrui
hanshi82
2006-11-13
_______________________________________________
Gems-users mailing list
Gems-users@xxxxxxxxxxx
https://lists.cs.wisc.edu/mailman/listinfo/gems-users
Use Google to search the GEMS Users mailing list by adding "site:https://lists.cs.wisc.edu/archive/gems-users/" to your search.