Re: [Gems-users] Multi-line cache states

["Mike Marty" <mikem@xxxxxxxxxxx>]

> 
> > 
> > Is it possible to change the states of multiple
> > cache-lines with a single event ? Can all lines be
> > changed atomically.
> > 
> > For eg: Lets say that with a event PrRd to address
> > 0x0a00 I want to downgrade all 'M' to 'S' lines. This
> > should happen atomically.
> > 
> 
> You can add a function that manipulates several cache lines.  
> You would call this from the setState() method in the SLICC 
> controller.  
> 
> You can either add it to CacheMemory.h itself, or to some 
> other place like RubySlicc_Util.C
> 

Also Brad's answer is more correct assuming you need to respect the
coherence protocol.  If you simply wanted to invalidate a chunk of cache
lines without regard of the actions of the protocol, then you can use a
function to directly manipulate the cache lines.