[DynInst_API:] [dyninst/dyninst] e0c12b: RISC-V Instruction API (#2046)

[wxrdnx <noreply@xxxxxxxxxx>]

  Branch: refs/heads/angushe/sail-to-rose
  Home:   https://github.com/dyninst/dyninst
  Commit: e0c12bc4adfcd911e6a7427291699e923db34489
      https://github.com/dyninst/dyninst/commit/e0c12bc4adfcd911e6a7427291699e923db34489
  Author: wxrdnx <67510189+wxrdnx@xxxxxxxxxxxxxxxxxxxxxxxx>
  Date:   2025-12-11 (Thu, 11 Dec 2025)

  Changed paths:
    M cmake/DyninstWarnings.cmake
    A common/src/arch-riscv64.h
    M instructionAPI/CMakeLists.txt
    M instructionAPI/h/ArchSpecificFormatters.h
    M instructionAPI/h/Instruction.h
    M instructionAPI/h/Operation_impl.h
    M instructionAPI/src/ArchSpecificFormatters.C
    M instructionAPI/src/Instruction.C
    M instructionAPI/src/InstructionDecoderImpl.C
    M instructionAPI/src/Operation.C
    A instructionAPI/src/decoder/riscv/categories.h
    A instructionAPI/src/decoder/riscv/decoder.C
    A instructionAPI/src/decoder/riscv/decoder.h
    A instructionAPI/src/decoder/riscv/mem_xlat.C
    A instructionAPI/src/decoder/riscv/mem_xlat.h
    A instructionAPI/src/decoder/riscv/opcode_xlat.C
    A instructionAPI/src/decoder/riscv/opcode_xlat.h
    A instructionAPI/src/decoder/riscv/register_xlat.C
    A instructionAPI/src/decoder/riscv/register_xlat.h
    A instructionAPI/src/decoder/type_conversion.h
    M instructionAPI/src/interrupts.C
    M tests/CMakeLists.txt
    M tests/integration/CMakeLists.txt
    A tests/integration/InstructionAPI/decoder/riscv/CMakeLists.txt
    A tests/integration/InstructionAPI/decoder/riscv/a_ext.cpp
    A tests/integration/InstructionAPI/decoder/riscv/branches.cpp
    A tests/integration/InstructionAPI/decoder/riscv/c_ext.cpp
    A tests/integration/InstructionAPI/decoder/riscv/d_ext.cpp
    A tests/integration/InstructionAPI/decoder/riscv/f_ext.cpp
    A tests/integration/InstructionAPI/decoder/riscv/m_ext.cpp
    A tests/integration/InstructionAPI/decoder/riscv/pseudo.cpp
    A tests/integration/InstructionAPI/decoder/riscv/rv64i_base.cpp
    A tests/integration/InstructionAPI/decoder/riscv/zicsr_ext.cpp
    A tests/opcode_tests.cpp
    A tests/opcode_tests.h

  Log Message:
  -----------
  RISC-V Instruction API (#2046)


  Commit: fed7be12d49beb983d5a7c0995aa9082d4b86be5
      https://github.com/dyninst/dyninst/commit/fed7be12d49beb983d5a7c0995aa9082d4b86be5
  Author: bbiiggppiigg <bbiiggppiigg@xxxxxxxxx>
  Date:   2025-12-13 (Sat, 13 Dec 2025)

  Changed paths:
    M common/src/arch-x86.C
    M common/src/arch-x86.h
    M instructionAPI/src/InstructionDecoder-x86.C

  Log Message:
  -----------
  Add support for vmovd instruction (#2075)


  Commit: 1682048eea483e4efea2245ed9e2d257a688d394
      https://github.com/dyninst/dyninst/commit/1682048eea483e4efea2245ed9e2d257a688d394
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2025-12-14 (Sun, 14 Dec 2025)

  Changed paths:
    A dataflowAPI/sail/ASTAdjust.pm
    A dataflowAPI/sail/ASTBuild.pm
    A dataflowAPI/sail/ASTBuildFunc.pm
    A dataflowAPI/sail/ASTBuildHelper.pm
    A dataflowAPI/sail/ASTNode.pm
    A dataflowAPI/sail/ASTType.pm
    A dataflowAPI/sail/ParserCommon.pm
    A dataflowAPI/sail/ParserConfig.pm
    A dataflowAPI/sail/PrintROSE.pm
    A dataflowAPI/sail/README.md
    A dataflowAPI/sail/config/rv64gc.json
    A dataflowAPI/sail/json_to_rose.pl
    A dataflowAPI/sail/riscv.sail_project

  Log Message:
  -----------
  Add SAIL to ROSE parser


Compare: https://github.com/dyninst/dyninst/compare/bdecc21e2ce6...1682048eea48

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