[DynInst_API:] [dyninst/dyninst] 7d3a70: Add RISC-V instruction mnemonics and registers

[wxrdnx <noreply@xxxxxxxxxx>]

  Branch: refs/heads/angushe/riscv-symtab-api
  Home:   https://github.com/dyninst/dyninst
  Commit: 7d3a70b92486080e7523d3038fe590f61832f946
      https://github.com/dyninst/dyninst/commit/7d3a70b92486080e7523d3038fe590f61832f946
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M common/CMakeLists.txt
    M common/h/Architecture.h
    M common/h/dyn_regs.h
    M common/h/entryIDs.h
    A common/h/mnemonics/riscv64_entryIDs.h
    A common/h/registers/riscv64_regs.h
    M common/src/registers/MachRegister.C
    M dataflowAPI/rose/registers/convert.C
    A dataflowAPI/rose/registers/riscv64.h
    M dataflowAPI/src/ExpressionConversionVisitor.C
    M dwarf/src/dwarfHandle.C
    M dwarf/src/registers/convert.C
    A dwarf/src/registers/riscv64.h
    M elf/src/Elf_X.C
    A external/rose/riscv64InstructionEnum.h
    M instructionAPI/capstone/import_mnemonics.py
    A instructionAPI/capstone/riscv64/mnemonics.py
    A instructionAPI/capstone/riscv64/registers.py
    M instructionAPI/src/Instruction.C
    M instructionAPI/src/interrupts.C
    M instructionAPI/src/syscalls.C
    M parseAPI/src/SymbolicExpression.C
    M proccontrol/src/process.C
    M symtabAPI/src/Object-elf.C
    M symtabAPI/src/emitElf.C
    A symtabAPI/src/emitElfStatic-riscv64.C
    M symtabAPI/src/emitElfStatic.C
    A symtabAPI/src/relocationEntry-elf-riscv64.C
    M tests/unit/MachRegister/base_registers/CMakeLists.txt
    A tests/unit/MachRegister/base_registers/riscv64.cpp
    M tests/unit/MachRegister/type_queries/CMakeLists.txt
    A tests/unit/MachRegister/type_queries/riscv64.cpp
    M tests/unit/dataflowAPI/rose/registers/CMakeLists.txt
    A tests/unit/dataflowAPI/rose/registers/riscv64.cpp

  Log Message:
  -----------
  Add RISC-V instruction mnemonics and registers



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