[DynInst_API:] [dyninst/dyninst] 40f929: Add initial support for analyzing AMDGPU binaries ...

[noreply@xxxxxxxxxx]

  Branch: refs/heads/master
  Home:   https://github.com/dyninst/dyninst
  Commit: 40f9295af0666d7eed13f8c69236ae24e77969c1
      https://github.com/dyninst/dyninst/commit/40f9295af0666d7eed13f8c69236ae24e77969c1
  Author: bbiiggppiigg <bbiiggppiigg@xxxxxxxxx>
  Date:   2020-11-23 (Mon, 23 Nov 2020)

  Changed paths:
    A common/h/amdgpu_op_table.h
    A common/h/amdgpu_vega_sys_regs.h
    M common/h/dyn_regs.h
    M common/h/entryIDs.h
    M common/src/dyn_regs.C
    M dataflowAPI/rose/conversions.h
    M dataflowAPI/rose/semantics/Registers.C
    M dataflowAPI/src/AbslocInterface.C
    M dataflowAPI/src/ExpressionConversionVisitor.C
    M dataflowAPI/src/RoseInsnFactory.C
    M dataflowAPI/src/RoseInsnFactory.h
    M dataflowAPI/src/SymEval.C
    M dataflowAPI/src/SymbolicExpansion.C
    M dataflowAPI/src/SymbolicExpansion.h
    M dataflowAPI/src/convertOpcodes.C
    M dwarf/src/dwarfHandle.C
    M elf/src/Elf_X.C
    A external/rose/amdgpuInstructionEnum.h
    M external/rose/rose-compat.h
    M instructionAPI/CMakeLists.txt
    M instructionAPI/h/ArchSpecificFormatters.h
    M instructionAPI/h/BinaryFunction.h
    M instructionAPI/h/Instruction.h
    M instructionAPI/h/InstructionCategories.h
    M instructionAPI/h/Operation_impl.h
    A instructionAPI/h/Ternary.h
    M instructionAPI/src/ArchSpecificFormatters.C
    M instructionAPI/src/Expression.C
    M instructionAPI/src/Instruction.C
    M instructionAPI/src/InstructionCategories.C
    A instructionAPI/src/InstructionDecoder-amdgpu-vega.C
    A instructionAPI/src/InstructionDecoder-amdgpu-vega.h
    M instructionAPI/src/InstructionDecoderImpl.C
    M instructionAPI/src/InstructionDecoderImpl.h
    M instructionAPI/src/Register.C
    A instructionAPI/src/Ternary.C
    A instructionAPI/src/amdgpu_branchinsn_table.h
    A instructionAPI/src/amdgpu_decoder_impl_vega.C
    A instructionAPI/src/amdgpu_decoder_impl_vega.h
    A instructionAPI/src/amdgpu_insn_entry.h
    A instructionAPI/src/amdgpu_opcode_tables.C
    M parseAPI/CMakeLists.txt
    M parseAPI/src/IA_IAPI.C
    A parseAPI/src/IA_amdgpu.C
    A parseAPI/src/IA_amdgpu.h
    M parseAPI/src/IndirectAnalyzer.C
    M parseAPI/src/Parser.C
    M parseAPI/src/SymbolicExpression.C
    M proccontrol/src/process.C

  Log Message:
  -----------
  Add initial support for analyzing AMDGPU binaries (#900)

* remove unnecessary assertion for unknown phdr_type

* add initial stubs for amdgpu support

* add formatters for amdgpu

* add opcode table and register definition

* added support for register vector

* add untracked files

* commit stubs for xiaozhu to see

* initial cfg traversal done

* remove unused register-pair related files

* remove symbol patching since the 256 byte function header is no longer there

* Do not assert in getBaseRegister

* fix instruction length detection and decoding logic

* now decode will only decode operands for branch instructions

* added basic support for amdgpu in rose

* merged upstream

* fix a bug where we decode the vdst as ssrc

* improve the logic for computing len of instructions that might make use of literals, such that we no longer need to pass the buffer all over the place

* fix undefined behavior for std::transform

* Remove empty code blocks/Unreachable code/Unneeded
Comment out dead code
Restore sym_debug_parsing to default value 0

* Added meaningful name and comments to function prototype of getAMDGPURoseRegisters
Remove duplicate public modifiers in class declaration.

* remove unnecessary include of boost/format.hpp

* remove all amdgpu related stuff in dataflowAPI, and patched indirect analyzer so it skips for amdgpu

* renaming Arch_amdgpu to Arch_amdgpu_vega

* make changes to use namespace amdgpu_vega instead of amdgpu

* change the naming of c_NonReturnInsn to c_GPUKernelExitInsn as suggested

Co-authored-by: Xiaozhu Meng <mxz297@xxxxxxxxx>