[DynInst_API:] [dyninst/dyninst] b19e34: Note for implementation added, XX3 formants in opc...

[Yuhan Xie <yxie@xxxxxxxxxxxxxxxxxx>]

  Branch: refs/heads/power_vector
  Home:   https://github.com/dyninst/dyninst
  Commit: b19e347b97d61c054e2071b605d4ad03da05c961
      https://github.com/dyninst/dyninst/commit/b19e347b97d61c054e2071b605d4ad03da05c961
  Author: Yuhan Xie <yxie@xxxxxxxxxxxxxxxxxx>
  Date:   2018-10-11 (Thu, 11 Oct 2018)

  Changed paths:
    M common/h/entryIDs.h
    M instructionAPI/src/InstructionDecoder-power.C
    M instructionAPI/src/power_opcode_tables.C

  Log Message:
  -----------
  Note for implementation added, XX3 formants in opcode 60 revised, new opcodes added

Revised:
  - opcode with XX3 formats: extended opcode are expanded from 21-28 to 21-29,
	with last bit treated as 0 and 1 respectively
  - The instructions with Rc bits, included Rc in the extended opcode,
	treated the instructions with Rc=0 and Rc=1 as different opcodes.

	new:
	-xvtstdcdp (P760): DCMX field is chopped into 3 parts. May be a special case in implementation.
	-**new Keyword: UIM:
	   field 12-15 immediate field (xxextractuw,xxinsertw (P766))
	   field 14-15 immediate field (xxspltw (P774))
	  //I think UIM should be modified to a certain expression to show what exact bits are for UIM
	-new Keyword: SHW:
	   field 22-23 specify a shift amount in words
   skipped:
	    -xxpermdi (P773), three arbitrary digits
	    -xxsel (P773), XX4 form
	    -xxsldwi (P774), three arbitrary digits



      **NOTE:** This service has been marked for deprecation: https://developer.github.com/changes/2018-04-25-github-services-deprecation/

      Functionality will be removed from GitHub.com on January 31st, 2019.