Date: | Thu, 26 Apr 2018 11:37:52 -0700 |
---|---|
From: | Sasha Nicolas <sasha@xxxxxxxxxxx> (arm1) |
Subject: | [DynInst_API:] [dyninst/dyninst] 938491: Adding Equal Operation case for emitImm. |
Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 938491816da991d2389cf26552fff12e164241fe https://github.com/dyninst/dyninst/commit/938491816da991d2389cf26552fff12e164241fe Author: Sasha Nicolas (arm1) <sasha@xxxxxxxxxxx> Date: 2018-04-26 (Thu, 26 Apr 2018) Changed paths: M common/src/arch-aarch64.h M dyninstAPI/src/addressSpace.C M dyninstAPI/src/codegen-aarch64.C M dyninstAPI/src/emit-aarch64.C M dyninstAPI/src/inst-aarch64.C Log Message: ----------- Adding Equal Operation case for emitImm. Correcting instruction encoding for ADD and SUB to modify flags register. Minor fixes. |
[← Prev in Thread] | Current Thread | [Next in Thread→] |
---|---|---|
|
Previous by Date: | Re: [DynInst_API:] FATAL 68 Dyninst, Xiaozhu Meng |
---|---|
Next by Date: | Re: [DynInst_API:] FATAL 68 Dyninst, Alberto Olmo |
Previous by Thread: | [DynInst_API:] [dyninst/dyninst] 92115c: Implementing more instruction generators for div a..., Sasha Nicolas |
Next by Thread: | [DynInst_API:] [dyninst/dyninst] 93cc79: 1. If finalizing a function needs to invoke a pars..., Xiaozhu Meng |
Indexes: | [Date] [Thread] |