Branch: refs/heads/aarch32
Home: https://github.com/dyninst/dyninst
Commit: 6d5aa63eea7d3cd1491da49a3c6ef9668d79f4f1
https://github.com/dyninst/dyninst/commit/6d5aa63eea7d3cd1491da49a3c6ef9668d79f4f1
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-05-13 (Fri, 13 May 2016)
Changed paths:
M instructionAPI/src/Instruction.C
Log Message:
-----------
Refactored format()
Commit: 4f59a5b5eb34d0408ca1ce0794c56743af78a698
https://github.com/dyninst/dyninst/commit/4f59a5b5eb34d0408ca1ce0794c56743af78a698
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-05-19 (Thu, 19 May 2016)
Changed paths:
M instructionAPI/h/Dereference.h
M instructionAPI/src/Immediate.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/Register.C
Log Message:
-----------
Simple syntax fixes
Commit: 0e3bd7b3e5001901051bd90f7271fd1af6d3d049
https://github.com/dyninst/dyninst/commit/0e3bd7b3e5001901051bd90f7271fd1af6d3d049
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-05-23 (Mon, 23 May 2016)
Changed paths:
M instructionAPI/h/Immediate.h
M instructionAPI/src/Immediate.C
Log Message:
-----------
Support custom formatting for ARM64 operand that specifies the prefetch type for the PRFM instruction and ARM64 operands that correspond to a condition code:
* The 18 prefetch types that can appear in the first operand of the PRFM instructions should be printed as their string representation (as provided in the manual), and not as the raw immediate values.
ArmPrfmTypeImmediate extends Immediate to have a custom formatting method that uses a map to get the string representation, while keeping the rest of the functionality same as the base class.
* The 16 condition codes that can appear in conditional instructions should be printed as their two-letter representation (as provided in the manual), and not as the raw immediate values.
ArmConditionImmediate extends Immediate to have a custom formatting method that uses a map to get the condition code string representation, while keeping the rest of the functionality same as the base class.
Commit: bbd7dc60e3faddf0af9fd83ae9477288dffe6503
https://github.com/dyninst/dyninst/commit/bbd7dc60e3faddf0af9fd83ae9477288dffe6503
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-05-23 (Mon, 23 May 2016)
Changed paths:
M CMakeLists.txt
M cmake/options.cmake
M common/h/dyn_regs.h
M common/h/entryIDs.h
M common/src/arch-x86.C
M common/src/arch-x86.h
M common/src/dyn_regs.C
A dataflowAPI/doc/API-template.tex
A dataflowAPI/doc/API/template.tex
A dataflowAPI/doc/AbsLocs.tex
A dataflowAPI/doc/Abstractions.tex
A dataflowAPI/doc/Assignment.tex
A dataflowAPI/doc/Extending.tex
A dataflowAPI/doc/Graph.tex
A dataflowAPI/doc/Intro.tex
A dataflowAPI/doc/README
A dataflowAPI/doc/Semantics.tex
A dataflowAPI/doc/Slicing.tex
A dataflowAPI/doc/StackAnalysis.tex
A dataflowAPI/doc/StackHeight.tex
A dataflowAPI/doc/SymEval.tex
A dataflowAPI/doc/dataflowAPI.tex
A dataflowAPI/doc/example.cc
A dataflowAPI/doc/paradyn_logo.pdf
M dataflowAPI/src/RegisterMap.C
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/RegisterConversion-x86.C
M dyninstAPI/src/addressSpace.C
M dyninstAPI/src/codegen-x86.C
M dyninstAPI/src/syscallNotification.C
M external/rose/rose-compat.h
M instructionAPI/h/Dereference.h
M instructionAPI/src/Immediate.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-x86.C
M instructionAPI/src/Register.C
M parseAPI/src/IA_IAPI.C
M patchAPI/src/AddrSpace.C
M stackwalk/src/analysis_stepper.C
M symtabAPI/src/Symtab.C
M symtabAPI/src/emitElf-64.C
Log Message:
-----------
Merge branch 'master' into att_syntax
Commit: add0e5817e7310c5b3540aa3b12576f5bca49223
https://github.com/dyninst/dyninst/commit/add0e5817e7310c5b3540aa3b12576f5bca49223
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-05-23 (Mon, 23 May 2016)
Changed paths:
M common/src/arch-x86.C
M common/src/arch-x86.h
M instructionAPI/h/Register.h
M instructionAPI/src/InstructionDecoder-x86.C
M instructionAPI/src/InstructionDecoderImpl.C
M instructionAPI/src/InstructionDecoderImpl.h
M instructionAPI/src/Register.C
Log Message:
-----------
Merge branch 'VEX' into att_syntax
Commit: 74fc695f2a32566fd8ddfad5d1a2f7e113e5678e
https://github.com/dyninst/dyninst/commit/74fc695f2a32566fd8ddfad5d1a2f7e113e5678e
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-05-23 (Mon, 23 May 2016)
Changed paths:
M instructionAPI/h/Dereference.h
M instructionAPI/h/Result.h
M instructionAPI/src/Instruction.C
M instructionAPI/src/Register.C
Log Message:
-----------
Lots of syntactical corrections for AT&T syntax.
Commit: 74a1da3143992d6ae4aeddd9b3f08d3194bd00c7
https://github.com/dyninst/dyninst/commit/74a1da3143992d6ae4aeddd9b3f08d3194bd00c7
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-05-27 (Fri, 27 May 2016)
Changed paths:
M instructionAPI/h/Dereference.h
M instructionAPI/h/Visitor.h
M instructionAPI/src/Operand.C
Log Message:
-----------
Memory dereference syntax working now for ia32 (att_syntax)
Commit: c99313ab5734d390884b64ef5188622e1b716697
https://github.com/dyninst/dyninst/commit/c99313ab5734d390884b64ef5188622e1b716697
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-06-01 (Wed, 01 Jun 2016)
Changed paths:
M instructionAPI/h/BinaryFunction.h
M instructionAPI/h/Dereference.h
Log Message:
-----------
Fixed memory leak
Commit: 73676417a61d576d19e9a0479790899893fed7a1
https://github.com/dyninst/dyninst/commit/73676417a61d576d19e9a0479790899893fed7a1
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-09 (Tue, 09 Aug 2016)
Changed paths:
M .gitignore
M .travis.yml
R ALL_BUILD.vcxproj
M CMakeLists.txt
R Dyninst.sln
R DyninstAPI.sln
R INSTALL.vcxproj
R Installer/Installer.vdproj
M README
R ZERO_CHECK.vcxproj
R cmake/Modules/FindDIASDK.cmake
M cmake/packages.cmake
M cmake/shared.cmake
M common/CMakeLists.txt
R common/INSTALL.vcxproj
R common/common.sln
R common/common.vcproj
R common/common.vcxproj
M common/doc/manual_frontpage.tex
A common/h/aarch64_sys_regs.h
M common/h/dyn_regs.h
M common/h/entryIDs.h
M common/h/util.h
M common/src/Types.C
M common/src/addrtranslate-win.C
M common/src/arch-x86.C
M common/src/arch-x86.h
M common/src/dyn_regs.C
M common/src/serialize-bin.C
M common/src/util.C
R dataflowAPI/doc/API-template.tex
R dataflowAPI/doc/API/template.tex
A dataflowAPI/doc/AST.tex
M dataflowAPI/doc/AbsLocs.tex
M dataflowAPI/doc/Abstractions.tex
M dataflowAPI/doc/Assignment.tex
A dataflowAPI/doc/Examples.tex
R dataflowAPI/doc/Extending.tex
M dataflowAPI/doc/Graph.tex
M dataflowAPI/doc/Intro.tex
R dataflowAPI/doc/Semantics.tex
M dataflowAPI/doc/Slicing.tex
M dataflowAPI/doc/StackAnalysis.tex
R dataflowAPI/doc/StackHeight.tex
M dataflowAPI/doc/SymEval.tex
A dataflowAPI/doc/dataflowAPI.pdf
M dataflowAPI/doc/dataflowAPI.tex
R dataflowAPI/doc/example.cc
M dataflowAPI/h/stackanalysis.h
A dataflowAPI/rose/ExtentMap.C
A dataflowAPI/rose/ExtentMap.h
A dataflowAPI/rose/RegisterDescriptor.h
A dataflowAPI/rose/SgAsmArmv8Instruction.h
M dataflowAPI/rose/SgAsmExpression.h
M dataflowAPI/rose/SgAsmInstruction.h
M dataflowAPI/rose/SgAsmOperandList.h
M dataflowAPI/rose/SgAsmType.h
M dataflowAPI/rose/SgAsmx86Instruction.h
M dataflowAPI/rose/SgNode.h
M dataflowAPI/rose/conversions.h
M dataflowAPI/rose/integerOps.h
M dataflowAPI/rose/powerpcInstructionSemantics.h
A dataflowAPI/rose/rangemap.C
A dataflowAPI/rose/rangemap.h
A dataflowAPI/rose/semantics/BaseSemantics2.C
A dataflowAPI/rose/semantics/BaseSemantics2.h
A dataflowAPI/rose/semantics/BinarySymbolicExpr.C
A dataflowAPI/rose/semantics/BinarySymbolicExpr.h
A dataflowAPI/rose/semantics/ByteOrder.C
A dataflowAPI/rose/semantics/ByteOrder.h
A dataflowAPI/rose/semantics/ConcreteSemantics2.C
A dataflowAPI/rose/semantics/ConcreteSemantics2.h
A dataflowAPI/rose/semantics/DispatcherARM64.C
A dataflowAPI/rose/semantics/DispatcherARM64.h
A dataflowAPI/rose/semantics/MemoryMap.C
A dataflowAPI/rose/semantics/MemoryMap.h
A dataflowAPI/rose/semantics/RegisterParts.C
A dataflowAPI/rose/semantics/RegisterParts.h
A dataflowAPI/rose/semantics/RegisterStateGeneric.C
A dataflowAPI/rose/semantics/RegisterStateGeneric.h
A dataflowAPI/rose/semantics/Registers.C
A dataflowAPI/rose/semantics/Registers.h
A dataflowAPI/rose/semantics/SMTSolver.C
A dataflowAPI/rose/semantics/SMTSolver.h
A dataflowAPI/rose/semantics/SymEvalSemantics.C
A dataflowAPI/rose/semantics/SymEvalSemantics.h
A dataflowAPI/rose/util/Access.h
A dataflowAPI/rose/util/AddressMap.h
A dataflowAPI/rose/util/AddressSegment.h
A dataflowAPI/rose/util/AllocatingBuffer.h
A dataflowAPI/rose/util/Assert.C
A dataflowAPI/rose/util/Assert.h
A dataflowAPI/rose/util/Attribute.C
A dataflowAPI/rose/util/Attribute.h
A dataflowAPI/rose/util/BiMap.h
A dataflowAPI/rose/util/BitVector.h
A dataflowAPI/rose/util/BitVectorSupport.h
A dataflowAPI/rose/util/Buffer.h
A dataflowAPI/rose/util/Callbacks.h
A dataflowAPI/rose/util/Combinatorics.C
A dataflowAPI/rose/util/Combinatorics.h
A dataflowAPI/rose/util/Exception.h
A dataflowAPI/rose/util/FileSystem.C
A dataflowAPI/rose/util/FileSystem.h
A dataflowAPI/rose/util/FormatRestorer.h
A dataflowAPI/rose/util/Interval.h
A dataflowAPI/rose/util/IntervalMap.h
A dataflowAPI/rose/util/IntervalSet.h
A dataflowAPI/rose/util/IntervalSetMap.h
A dataflowAPI/rose/util/LinearCongruentialGenerator.C
A dataflowAPI/rose/util/LinearCongruentialGenerator.h
A dataflowAPI/rose/util/Map.h
A dataflowAPI/rose/util/MappedBuffer.h
A dataflowAPI/rose/util/Message.C
A dataflowAPI/rose/util/Message.h
A dataflowAPI/rose/util/NullBuffer.h
A dataflowAPI/rose/util/Optional.h
A dataflowAPI/rose/util/PoolAllocator.h
A dataflowAPI/rose/util/Sawyer.C
A dataflowAPI/rose/util/Sawyer.h
A dataflowAPI/rose/util/Set.h
A dataflowAPI/rose/util/SharedPointer.h
A dataflowAPI/rose/util/SmallObject.C
A dataflowAPI/rose/util/SmallObject.h
A dataflowAPI/rose/util/StaticBuffer.h
A dataflowAPI/rose/util/Stopwatch.C
A dataflowAPI/rose/util/Stopwatch.h
A dataflowAPI/rose/util/StringUtility.C
A dataflowAPI/rose/util/StringUtility.h
A dataflowAPI/rose/util/Synchronization.C
A dataflowAPI/rose/util/Synchronization.h
A dataflowAPI/rose/util/WarningsOff.h
A dataflowAPI/rose/util/WarningsRestore.h
A dataflowAPI/rose/util/rose_getline.C
A dataflowAPI/rose/util/rose_getline.h
A dataflowAPI/rose/util/rose_strtoull.C
A dataflowAPI/rose/util/rose_strtoull.h
M dataflowAPI/rose/x86_64InstructionSemantics.h
M dataflowAPI/src/ExpressionConversionVisitor.C
M dataflowAPI/src/RegisterMap.C
M dataflowAPI/src/RoseImpl.C
M dataflowAPI/src/RoseInsnFactory.C
M dataflowAPI/src/RoseInsnFactory.h
M dataflowAPI/src/SymEval.C
M dataflowAPI/src/SymbolicExpansion.C
M dataflowAPI/src/SymbolicExpansion.h
M dataflowAPI/src/convertOpcodes.C
M dataflowAPI/src/liveness.C
M dataflowAPI/src/stackanalysis.C
M dynC_API/doc/dynC_API.pdf
R dyninstAPI/INSTALL.vcxproj
M dyninstAPI/doc/dyninstAPI.doc
M dyninstAPI/doc/dyninstAPI.pdf
R dyninstAPI/dyninstAPI.vcproj
R dyninstAPI/dyninstAPI.vcxproj
M dyninstAPI/src/BPatch_type.C
M dyninstAPI/src/RegisterConversion-x86.C
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/Relocation/Widgets/CFWidget.C
M dyninstAPI/src/StackMod/StackAccess.C
M dyninstAPI/src/StackMod/StackLocation.h
M dyninstAPI/src/addressSpace.C
M dyninstAPI/src/addressSpace.h
M dyninstAPI/src/binaryEdit.C
M dyninstAPI/src/codegen-x86.C
M dyninstAPI/src/debug.C
M dyninstAPI/src/dynProcess.C
M dyninstAPI/src/function.C
M dyninstAPI/src/image.C
M dyninstAPI/src/parse-cfg.C
M dyninstAPI/src/parse-cfg.h
M dyninstAPI/src/pdwinnt.C
R dyninstAPI_RT/DyninstAPI_RT.vcproj
R dyninstAPI_RT/DyninstAPI_RT.vcxproj
R dyninstAPI_RT/INSTALL.vcxproj
R dyninstAPI_RT/dyninstAPI_RT_static.vcxproj
M dyninstAPI_RT/src/RTcommon.c
M dyninstAPI_RT/src/RTheap-linux.c
M dyninstAPI_RT/src/RTheap.c
M dyninstAPI_RT/src/RTposix.c
A external/cvconst/LICENSE
A external/cvconst/README
A external/cvconst/cvconst.h
M external/inttypes-win.h
A external/rose/armv8InstructionEnum.h
M external/rose/rose-compat.h
A external/rose/rose_msvc.h
M external/stdint-win.h
A external/variantComparer.py
R instructionAPI/INSTALL.vcxproj
R instructionAPI/aarch64_manual_pareser.py
A instructionAPI/aarch64_manual_parser.py
A instructionAPI/aarch64_sysreg_builder.py
M instructionAPI/doc/instructionAPI.pdf
R instructionAPI/instructionAPI.vcproj
R instructionAPI/instructionAPI.vcxproj
M instructionAPI/src/InstructionCategories.C
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/InstructionDecoder-aarch64.h
M instructionAPI/src/InstructionDecoder-x86.C
M instructionAPI/src/InstructionDecoder-x86.h
M instructionAPI/src/aarch64_opcode_tables.C
M parseAPI/CMakeLists.txt
R parseAPI/INSTALL.vcxproj
M parseAPI/doc/parseAPI.pdf
M parseAPI/h/CFGModifier.h
M parseAPI/h/CodeSource.h
M parseAPI/h/InstructionSource.h
R parseAPI/parseAPI.vcproj
R parseAPI/parseAPI.vcxproj
M parseAPI/src/BoundFactCalculator.C
M parseAPI/src/BoundFactData.C
M parseAPI/src/BoundFactData.h
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_aarch64Details.C
M parseAPI/src/IA_aarch64Details.h
M parseAPI/src/IA_platformDetails.h
M parseAPI/src/IA_powerDetails.C
M parseAPI/src/IA_powerDetails.h
M parseAPI/src/IA_x86.C
M parseAPI/src/IA_x86Details.C
M parseAPI/src/IA_x86Details.h
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectASTVisitor.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTablePred.C
M parseAPI/src/JumpTablePred.h
M parseAPI/src/ParseData.C
M parseAPI/src/Parser.C
M parseAPI/src/SymtabCodeSource.C
R patchAPI/INSTALL.vcxproj
M patchAPI/doc/patchAPI.pdf
R patchAPI/patchAPI.vcproj
R patchAPI/patchAPI.vcxproj
M proccontrol/doc/proccontrol.docx
M proccontrol/doc/proccontrol.pdf
M proccontrol/h/EventType.h
R proccontrol/pcontrol.vcxproj
R proccontrol/proccontrol.vcproj
R proccontrol/proccontrol.vcxproj
R proccontrol/proccontrol.vcxproj.filters
M proccontrol/src/GeneratorWindows.C
M proccontrol/src/irpc.C
M proccontrol/src/linux.C
M proccontrol/src/loadLibrary/injector.C
M proccontrol/src/process.C
M proccontrol/src/windows_process.C
M proccontrol/src/windows_process.h
R stackwalk/INSTALL.vcxproj
M stackwalk/doc/stackwalk.pdf
M stackwalk/h/frame.h
M stackwalk/src/frame.C
M stackwalk/src/win-x86-swk.C
R stackwalk/stackwalk.vcproj
R stackwalk/stackwalk.vcxproj
M symtabAPI/CMakeLists.txt
R symtabAPI/INSTALL.vcxproj
R symtabAPI/SymtabAPI.sln
M symtabAPI/doc/symtabAPI.pdf
M symtabAPI/h/Aggregate.h
M symtabAPI/h/Function.h
M symtabAPI/h/Symbol.h
M symtabAPI/h/Symtab.h
M symtabAPI/h/Variable.h
M symtabAPI/src/Aggregate.C
M symtabAPI/src/Function.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object-nt.C
M symtabAPI/src/Object.C
M symtabAPI/src/Object.h
M symtabAPI/src/Symbol.C
M symtabAPI/src/Symtab-lookup.C
M symtabAPI/src/Type.C
M symtabAPI/src/Variable.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
R symtabAPI/src/emitElf-64.C
R symtabAPI/src/emitElf-64.h
A symtabAPI/src/emitElf.C
A symtabAPI/src/emitElf.h
M symtabAPI/src/emitElfStatic.C
R symtabAPI/symtabAPI.vcproj
R symtabAPI/symtabAPI.vcxproj
Log Message:
-----------
Merge branch 'master' into att_syntax
Commit: 0cd6d38a02d7d45649b7d40f44b4f72935b85a9b
https://github.com/dyninst/dyninst/commit/0cd6d38a02d7d45649b7d40f44b4f72935b85a9b
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-11 (Thu, 11 Aug 2016)
Changed paths:
M instructionAPI/h/BinaryFunction.h
M instructionAPI/h/Dereference.h
M instructionAPI/src/Immediate.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/Operand.C
M instructionAPI/src/Register.C
Log Message:
-----------
Fixes for addressing dereference syntaxes. There is still an issue with some IP relative jumps
and calls. Debugging output is still enabled.
Commit: 6a6017a44f23d2e1c0d049852858ef114aae4c2b
https://github.com/dyninst/dyninst/commit/6a6017a44f23d2e1c0d049852858ef114aae4c2b
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-11 (Thu, 11 Aug 2016)
Changed paths:
M proccontrol/src/linux.C
M proccontrol/src/loadLibrary/codegen.C
Log Message:
-----------
Merge branch 'master' into att_syntax
Commit: 2febc48e23cb5158ff6ae322a9d14e9a3791c41a
https://github.com/dyninst/dyninst/commit/2febc48e23cb5158ff6ae322a9d14e9a3791c41a
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-12 (Fri, 12 Aug 2016)
Changed paths:
M instructionAPI/h/Dereference.h
M instructionAPI/src/Immediate.C
M instructionAPI/src/Operand.C
M instructionAPI/src/Register.C
Log Message:
-----------
Lots of bug fixes for AT&T syntax. Comments added for syntax generation algorithm.
NOTE: it would be much better to generate instruction syntaxes at decoding time. This
would also allow us to do architecture/language specific decodings. This would also
help with the AT&T operand ordering issue.
Commit: 6a5f645dba5e3467986d417f31ddb7d04c5b246c
https://github.com/dyninst/dyninst/commit/6a5f645dba5e3467986d417f31ddb7d04c5b246c
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-15 (Mon, 15 Aug 2016)
Changed paths:
M instructionAPI/src/Instruction.C
Log Message:
-----------
Objdump output doesn't have spaces between operands.
Commit: 3b88b8711ad5ecdac3c4c7cb2ca324641abcddc1
https://github.com/dyninst/dyninst/commit/3b88b8711ad5ecdac3c4c7cb2ca324641abcddc1
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-15 (Mon, 15 Aug 2016)
Changed paths:
M instructionAPI/src/Instruction.C
M instructionAPI/src/Operand.C
Log Message:
-----------
Jumps and calls now print format similar to objdump. Bad instructions
are now printed out as (bad) instead of No_Entry.
Commit: 8074859d20765cac2ad1920ffc19fb6d2d2750dd
https://github.com/dyninst/dyninst/commit/8074859d20765cac2ad1920ffc19fb6d2d2750dd
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-17 (Wed, 17 Aug 2016)
Changed paths:
M common/src/arch-x86.C
M common/src/arch-x86.h
M instructionAPI/h/Operand.h
M instructionAPI/src/InstructionDecoder-x86.C
M instructionAPI/src/InstructionDecoder-x86.h
Log Message:
-----------
Inital support for x86 implicit operands
Commit: 6699989dd5f64d94c61e62915eeed3b558025c1a
https://github.com/dyninst/dyninst/commit/6699989dd5f64d94c61e62915eeed3b558025c1a
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-17 (Wed, 17 Aug 2016)
Changed paths:
M common/src/arch-x86.C
M common/src/arch-x86.h
M dataflowAPI/src/stackanalysis.C
M dyninstAPI/src/image.C
M dyninstAPI/src/image.h
M instructionAPI/h/Operand.h
M instructionAPI/src/InstructionDecoder-x86.C
M instructionAPI/src/InstructionDecoder-x86.h
Log Message:
-----------
Merge branch 'release9.2/fixes/test_pt_ls' into att_syntax
Commit: 1b494f9597ed98fbee168915021ba7c5b273f8f9
https://github.com/dyninst/dyninst/commit/1b494f9597ed98fbee168915021ba7c5b273f8f9
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-17 (Wed, 17 Aug 2016)
Log Message:
-----------
Merge branch 'master' into att_syntax
Commit: 748a2c56cc3414ae66aaa839b71b13afb46c95d4
https://github.com/dyninst/dyninst/commit/748a2c56cc3414ae66aaa839b71b13afb46c95d4
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-17 (Wed, 17 Aug 2016)
Changed paths:
M common/src/arch-x86.C
M common/src/arch-x86.h
M instructionAPI/h/Instruction.h
M instructionAPI/h/Operand.h
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-x86.C
Log Message:
-----------
Added support for implicit operands for AT&T syntax
Commit: 48f8d7b67bccf3c4d2739ed328e337eda2667a82
https://github.com/dyninst/dyninst/commit/48f8d7b67bccf3c4d2739ed328e337eda2667a82
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-22 (Mon, 22 Aug 2016)
Changed paths:
M common/h/entryIDs.h
M common/src/arch-x86.C
M instructionAPI/h/BinaryFunction.h
M instructionAPI/h/Dereference.h
M instructionAPI/h/Operand.h
M instructionAPI/src/Instruction.C
M instructionAPI/src/Operand.C
M instructionAPI/src/Register.C
Log Message:
-----------
Syntax fixes, instruction suffixes updated and other formatting bug fixes
Commit: 898119cabf7d99542a938006f2419323ec886cb9
https://github.com/dyninst/dyninst/commit/898119cabf7d99542a938006f2419323ec886cb9
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-22 (Mon, 22 Aug 2016)
Changed paths:
M common/h/entryIDs.h
M common/src/arch-x86.C
Log Message:
-----------
Implicit operands marked for some FPU instructions
Commit: 795613ea9ea08da6ff6a0b7f20a464d4fb1942e2
https://github.com/dyninst/dyninst/commit/795613ea9ea08da6ff6a0b7f20a464d4fb1942e2
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-08-23 (Tue, 23 Aug 2016)
Changed paths:
M common/src/arch-x86.C
Log Message:
-----------
More instruction fixes
Commit: 5aa718b3d99e55a84c85c763678623b474d85807
https://github.com/dyninst/dyninst/commit/5aa718b3d99e55a84c85c763678623b474d85807
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-09-06 (Tue, 06 Sep 2016)
Changed paths:
M instructionAPI/src/Instruction.C
Log Message:
-----------
Removed reference to nullptr for GCC 4.4.0 compatability
Commit: fd7100d9a694cc58488d6ea16d8811e0002edd7b
https://github.com/dyninst/dyninst/commit/fd7100d9a694cc58488d6ea16d8811e0002edd7b
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-09-06 (Tue, 06 Sep 2016)
Changed paths:
M instructionAPI/src/Operand.C
Log Message:
-----------
More nullptr fixes
Commit: 91f68981d16606d4c725a27315c6f970bf83addc
https://github.com/dyninst/dyninst/commit/91f68981d16606d4c725a27315c6f970bf83addc
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-10-17 (Mon, 17 Oct 2016)
Changed paths:
A instructionAPI/h/ArchSpecificFormatters.h
Log Message:
-----------
Class declaration for base architecture specific formatter
The new strategy for instruction formatting is to have a class for each
architecture which inherit from a base class. All methods of the latter
are to be pure virtual, each representing formatting of a different type
of leaf node that can appear in the AST (register, immediate, dereference) and a method for re-ordering the operands if necessary that also returning the final instruction string.
Commit: a41383bc7229ccfad4c6c372edcd0bc39ac46126
https://github.com/dyninst/dyninst/commit/a41383bc7229ccfad4c6c372edcd0bc39ac46126
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-10-17 (Mon, 17 Oct 2016)
Changed paths:
M instructionAPI/CMakeLists.txt
M instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/h/BinaryFunction.h
M instructionAPI/h/Dereference.h
M instructionAPI/h/Expression.h
M instructionAPI/h/Immediate.h
M instructionAPI/h/Instruction.h
M instructionAPI/h/InstructionAST.h
M instructionAPI/h/Operand.h
M instructionAPI/h/Register.h
A instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/Immediate.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/Operand.C
M instructionAPI/src/Register.C
Log Message:
-----------
Modifications to use the new ArchSpecificFormatter class for
instruction/operand formatting
The signature of the format() method in InstructionAST and all inherited
classes that override it is modified to include a pointer to an
ArchSpecificFormatter object. The methods for each operand type
(Register, Immediate and Dereference) call the appropriate method on
ArchSpecificFormatter. The pointer is initialized within the constructor
of the Instruction class which also includes a new method to retrieve it
from elsewhere (getFormatter()).
This commit also includes implementation of methods of the ArmFormatter
class. Instruction::format() currently returns an empty string for architectures other
than ARM64. Implementation for other architectures will be added in
future commits.
Commit: ba425e4cd103d9bead50b4c757374b28d1a32f55
https://github.com/dyninst/dyninst/commit/ba425e4cd103d9bead50b4c757374b28d1a32f55
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-10-17 (Mon, 17 Oct 2016)
Changed paths:
M dataflowAPI/src/liveness.C
M dataflowAPI/src/stackanalysis.C
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/StackMod/StackAccess.C
M dyninstAPI/src/inst-x86.C
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_powerDetails.C
M parseAPI/src/IA_x86Details.C
Log Message:
-----------
Update the debug log message print calls across various APIs to use the
instruction's getFormatter() method when calling format() on an operand
of the instruction.
Commit: a979a5bff2e00f31bf4e058b5ff9557a3a2750c1
https://github.com/dyninst/dyninst/commit/a979a5bff2e00f31bf4e058b5ff9557a3a2750c1
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-10-21 (Fri, 21 Oct 2016)
Changed paths:
M instructionAPI/src/ArchSpecificFormatters.C
Log Message:
-----------
ARM syntax fixes dealign with hexadecimal values and commas and brackets in dereferences
Commit: 657761f1a1e4e5747ac860c89ca270c9b19de3bc
https://github.com/dyninst/dyninst/commit/657761f1a1e4e5747ac860c89ca270c9b19de3bc
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-10-24 (Mon, 24 Oct 2016)
Changed paths:
M instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/h/BinaryFunction.h
M instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Syntax fixes for ARM64
* Added new method to ArchSpecificFormatter for binary functions. The base class implements this with the older implementation in BinaryFunction::format().
* Modified ARM64 decoder to add a 0 Immediate to CMEQ's zero variant
* Other syntax fixes
Commit: d1d6e567d2bc5aac99c79a9c2ef3f63f47d75ff5
https://github.com/dyninst/dyninst/commit/d1d6e567d2bc5aac99c79a9c2ef3f63f47d75ff5
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-10-24 (Mon, 24 Oct 2016)
Changed paths:
M instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/Immediate.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/Register.C
Log Message:
-----------
Preparing for merge
Commit: 8b0c5ae3677fa29680371149b704090f15e5fa3b
https://github.com/dyninst/dyninst/commit/8b0c5ae3677fa29680371149b704090f15e5fa3b
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-10-24 (Mon, 24 Oct 2016)
Changed paths:
M instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/h/BinaryFunction.h
M instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
x86 syntax ready for testing.
Merge branch 'att_syntax' of http://github.com/dyninst/dyninst into att_syntax
Commit: ebf8254559f15de171090a3df744ceb39edf4b57
https://github.com/dyninst/dyninst/commit/ebf8254559f15de171090a3df744ceb39edf4b57
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-01 (Tue, 01 Nov 2016)
Changed paths:
M instructionAPI/h/BinaryFunction.h
M instructionAPI/h/Operand.h
M instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/Operand.C
Log Message:
-----------
AT&T syntax for x86_64 should be on par with libopcodes.
Commit: ff68cf0f8ed2699a1d34845928c0cf3b82c1f76a
https://github.com/dyninst/dyninst/commit/ff68cf0f8ed2699a1d34845928c0cf3b82c1f76a
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-07 (Mon, 07 Nov 2016)
Changed paths:
M common/h/entryIDs.h
M common/src/arch-x86.C
Log Message:
-----------
Fixed several of Nathan's reported issues including #193
Commit: d60c21bc943e800f95cc4d54fe4c21c1ee6a4902
https://github.com/dyninst/dyninst/commit/d60c21bc943e800f95cc4d54fe4c21c1ee6a4902
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-11-07 (Mon, 07 Nov 2016)
Changed paths:
M instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #216 (Repeated register number as constant)
Fixed appearance of the register number/immediate value as a constant in dereference
expressions using only a register/immediate for dereference.
Commit: dd48e72c1520f9d7bac94005f130f701d2c14b6e
https://github.com/dyninst/dyninst/commit/dd48e72c1520f9d7bac94005f130f701d2c14b6e
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-11-08 (Tue, 08 Nov 2016)
Changed paths:
M common/h/dyn_regs.h
M common/src/dyn_regs.C
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #220 (Zero register should have sizing, either XZR or WZR)
64-bit zero register is renamed from ZR to XZR.
This commit also allows the XZR register to appear in STP instructions.
Commit: de78ce551ff270c0e2a5ed5ffe11d270865ce974
https://github.com/dyninst/dyninst/commit/de78ce551ff270c0e2a5ed5ffe11d270865ce974
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-11-08 (Tue, 08 Nov 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #218 (Shifted immediate for CCMP and CCMN) and #219 (Invalid CCMP
and CCMN decoded as valid)
The 'nzcv' immediate in conditional compare instructions now appears
without being left-shifted, and these instructions are marked as invalid
if bit 4 is 1.
Commit: 9251bc6ba19d7f0cb78ad8884980e9d5c983ac4f
https://github.com/dyninst/dyninst/commit/9251bc6ba19d7f0cb78ad8884980e9d5c983ac4f
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-11-08 (Tue, 08 Nov 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #217 (Immediate out of range for LDRSB)
When 'size' field is 0 and but 1 of 'opc' field is 1, the value of 'imm12' should be left shifted by 4 ONLY for SIMD load/store instructions.
Commit: 5afd17c707ba0dca4fc32f48d5625e19d1700b97
https://github.com/dyninst/dyninst/commit/5afd17c707ba0dca4fc32f48d5625e19d1700b97
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-11-08 (Tue, 08 Nov 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Fixes for Issue #221 and #222
Correctly identify invaldi instructions in the move-wide immediate and
SIMD 3-different categories.
Commit: 08cff7b08eb946cc4877c293b72d319c70d5835b
https://github.com/dyninst/dyninst/commit/08cff7b08eb946cc4877c293b72d319c70d5835b
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-11-09 (Wed, 09 Nov 2016)
Changed paths:
M instructionAPI/src/aarch64_opcode_tables.C
Log Message:
-----------
Issue #223 (SIMD load instruction should be valid)
setRegWidth() need not be called for SIMD load/store instructions.
Commit: 7b572c5659e9b4093ac142b4c9af92f0694e7d32
https://github.com/dyninst/dyninst/commit/7b572c5659e9b4093ac142b4c9af92f0694e7d32
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-16 (Wed, 16 Nov 2016)
Changed paths:
M common/src/arch-x86.C
M instructionAPI/h/BinaryFunction.h
M instructionAPI/h/Dereference.h
M instructionAPI/h/Expression.h
M instructionAPI/h/Immediate.h
M instructionAPI/h/InstructionAST.h
M instructionAPI/h/Operand.h
M instructionAPI/h/Register.h
M instructionAPI/src/Immediate.C
M instructionAPI/src/Operand.C
M instructionAPI/src/Register.C
Log Message:
-----------
Old API restored
Commit: 121d6e3bab1f7a5424ce20afb582cd9cea8b9251
https://github.com/dyninst/dyninst/commit/121d6e3bab1f7a5424ce20afb582cd9cea8b9251
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-11-16 (Wed, 16 Nov 2016)
Changed paths:
M .gitignore
A .idea/deployment.xml
A .idea/webServers.xml
M .travis.yml
M CMakeLists.txt
R README
A README.md
A appveyor.yml
A cmake/cotire.cmake
M cmake/optimization.cmake
M cmake/packages.cmake
M cmake/shared.cmake
M cmake/warnings.cmake
M common/CMakeLists.txt
M common/h/IBSTree-fast.h
M common/h/IBSTree.h
M common/h/SymReader.h
M common/h/dyntypes.h
M common/src/addrtranslate-win.C
M common/src/arch-aarch64.C
M common/src/debug_common.h
M common/src/dyn_regs.C
M common/src/ntHeaders.h
M common/src/util.C
A dataflowAPI/README.md
M dataflowAPI/h/Absloc.h
M dataflowAPI/h/SymEval.h
M dataflowAPI/h/stackanalysis.h
M dataflowAPI/rose/SgAsmPowerpcInstruction.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/src/ABI.C
M dataflowAPI/src/Absloc.C
M dataflowAPI/src/SymEvalPolicy.C
M dataflowAPI/src/Visitors.C
M dataflowAPI/src/stackanalysis.C
M dwarf/CMakeLists.txt
M dwarf/h/dwarfHandle.h
M dwarf/src/dwarfHandle.C
M dwarf/src/dwarfResult.C
M dynC_API/CMakeLists.txt
M dynC_API/h/snippetGen.h
M dynC_API/src/C.l
M dynC_API/src/C.y
M dynC_API/src/dynC.C
M dynC_API/src/dynC.tab.C
M dynC_API/src/dynC.tab.h
M dynC_API/src/lex.dynC.C
M dyninstAPI/CMakeLists.txt
R dyninstAPI/README
A dyninstAPI/README.md
M dyninstAPI/h/BPatch_addressSpace.h
M dyninstAPI/h/BPatch_function.h
M dyninstAPI/h/BPatch_image.h
M dyninstAPI/h/BPatch_module.h
M dyninstAPI/h/BPatch_object.h
M dyninstAPI/h/BPatch_statement.h
M dyninstAPI/src/BPatch_addressSpace.C
M dyninstAPI/src/BPatch_function.C
M dyninstAPI/src/BPatch_image.C
M dyninstAPI/src/BPatch_module.C
M dyninstAPI/src/BPatch_object.C
M dyninstAPI/src/BPatch_statement.C
M dyninstAPI/src/BPatch_type.C
M dyninstAPI/src/Relocation/CodeTracker.C
M dyninstAPI/src/Relocation/CodeTracker.h
M dyninstAPI/src/Relocation/Springboard.h
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI/src/Relocation/Widgets/CFWidget.C
M dyninstAPI/src/Relocation/Widgets/StackModWidget.h
M dyninstAPI/src/StackMod/StackAccess.C
M dyninstAPI/src/StackMod/StackModChecker.C
M dyninstAPI/src/StackMod/StackModExpr.C
M dyninstAPI/src/StackMod/StackModExpr.h
M dyninstAPI/src/ast.C
M dyninstAPI/src/ast.h
M dyninstAPI/src/binaryEdit.C
M dyninstAPI/src/codegen-x86.C
M dyninstAPI/src/function.C
M dyninstAPI/src/image.C
M dyninstAPI/src/inst-x86.C
M dyninstAPI_RT/src/RTheap-win.c
M dyninstAPI_RT/src/RTheap.c
M dyninstAPI_RT/src/RTwinnt.c
R dynutil/CMakeLists.txt
M elf/CMakeLists.txt
M elf/h/Elf_X.h
M elf/src/Elf_X.C
M external/stdint-win.h
M instructionAPI/CMakeLists.txt
M instructionAPI/h/InstructionAST.h
M instructionAPI/src/BinaryFunction.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/InstructionDecoder-aarch64.h
R nmake.config
M parseAPI/CMakeLists.txt
R parseAPI/README
A parseAPI/README.md
M parseAPI/h/CFG.h
M parseAPI/h/CFGFactory.h
M parseAPI/h/CodeSource.h
M parseAPI/src/Block.C
M parseAPI/src/BoundFactCalculator.h
M parseAPI/src/BoundFactData.C
M parseAPI/src/BoundFactData.h
M parseAPI/src/IA_aarch64Details.C
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTablePred.C
M parseAPI/src/JumpTablePred.h
M parseAPI/src/ProbabilisticParser.C
M parseAPI/src/SymLiteCodeSource.C
M parseAPI/src/SymtabCodeSource.C
M parseAPI/src/util.h
R parseThat/README
A parseThat/README.md
M parseThat/src/record.C
M patchAPI/CMakeLists.txt
M proccontrol/CMakeLists.txt
A proccontrol/README.md
M proccontrol/src/handler.C
M proccontrol/src/int_process.h
M proccontrol/src/int_thread_db.C
M proccontrol/src/irpc.C
M proccontrol/src/linux.C
M proccontrol/src/linux.h
M proccontrol/src/loadLibrary/codegen-linux.C
M proccontrol/src/process.C
M proccontrol/src/processplat.C
M proccontrol/src/procset.C
M proccontrol/src/x86_process.C
M stackwalk/CMakeLists.txt
A stackwalk/README.md
M stackwalk/doc/3-API.tex
M stackwalk/doc/stackwalk.pdf
M stackwalk/src/linux-x86-swk.C
M symlite/CMakeLists.txt
A symlite/README.md
M symlite/h/SymLite-elf.h
M symlite/src/SymLite-elf.C
M symtabAPI/CMakeLists.txt
R symtabAPI/README
A symtabAPI/README.md
M symtabAPI/h/Function.h
M symtabAPI/h/LineInformation.h
M symtabAPI/h/Module.h
M symtabAPI/h/RangeLookup.h
A symtabAPI/h/StringTable.h
M symtabAPI/h/Symbol.h
M symtabAPI/h/Symtab.h
M symtabAPI/h/SymtabReader.h
M symtabAPI/src/Function.C
M symtabAPI/src/LineInformation.C
M symtabAPI/src/Module.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object-nt.C
M symtabAPI/src/Object-nt.h
M symtabAPI/src/Object.C
M symtabAPI/src/Object.h
M symtabAPI/src/Symtab-edit.C
M symtabAPI/src/Symtab-lookup.C
M symtabAPI/src/Symtab.C
M symtabAPI/src/SymtabReader.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElfStatic-x86.C
M symtabAPI/src/emitElfStatic.h
M symtabAPI/src/emitWin.C
Log Message:
-----------
Merge branch 'master' into att_syntax_formerge
Conflicts:
common/src/dyn_regs.C
dataflowAPI/src/stackanalysis.C
Commit: 2d7be7a0973aef10aa39859fd9eda96bb8b1aa76
https://github.com/dyninst/dyninst/commit/2d7be7a0973aef10aa39859fd9eda96bb8b1aa76
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-22 (Tue, 22 Nov 2016)
Changed paths:
M common/src/arch-x86.C
M instructionAPI/src/InstructionDecoder-x86.C
Log Message:
-----------
Removed unreachable instructions. Moved all remaining VEX instruction from SSE tables
into proper VEX tables.
Fixes #213 #199 #193 #195 #196
Commit: cd3ab6a4cd4ba62112d8a414b9b2e88399cb4240
https://github.com/dyninst/dyninst/commit/cd3ab6a4cd4ba62112d8a414b9b2e88399cb4240
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-22 (Tue, 22 Nov 2016)
Changed paths:
M .gitignore
M CMakeLists.txt
M cmake/shared.cmake
M cmake/warnings.cmake
M common/h/SymReader.h
M dynC_API/CMakeLists.txt
M dynC_API/src/C.l
M dynC_API/src/C.y
M dynC_API/src/dynC.tab.C
M dynC_API/src/dynC.tab.h
M dynC_API/src/lex.dynC.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI_RT/src/RTheap.c
M elf/h/Elf_X.h
M elf/src/Elf_X.C
M parseAPI/src/SymLiteCodeSource.C
M parseAPI/src/SymtabCodeSource.C
M proccontrol/src/int_process.h
M proccontrol/src/linux.C
M proccontrol/src/linux.h
M proccontrol/src/process.C
M stackwalk/doc/3-API.tex
M stackwalk/doc/stackwalk.pdf
M symlite/h/SymLite-elf.h
M symlite/src/SymLite-elf.C
M symtabAPI/h/Symtab.h
M symtabAPI/h/SymtabReader.h
M symtabAPI/src/LineInformation.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object-nt.C
M symtabAPI/src/Object-nt.h
M symtabAPI/src/Object.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/SymtabReader.C
Log Message:
-----------
Merge branch 'master' of http://github.com/dyninst/dyninst
Commit: b3f445059eaaa0c4e0a93d1a2bae638453c620b1
https://github.com/dyninst/dyninst/commit/b3f445059eaaa0c4e0a93d1a2bae638453c620b1
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-22 (Tue, 22 Nov 2016)
Changed paths:
M .gitignore
M CMakeLists.txt
M cmake/shared.cmake
M cmake/warnings.cmake
M common/h/SymReader.h
M dynC_API/CMakeLists.txt
M dynC_API/src/C.l
M dynC_API/src/C.y
M dynC_API/src/dynC.tab.C
M dynC_API/src/dynC.tab.h
M dynC_API/src/lex.dynC.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI_RT/src/RTheap.c
M elf/h/Elf_X.h
M elf/src/Elf_X.C
M parseAPI/src/SymLiteCodeSource.C
M parseAPI/src/SymtabCodeSource.C
M proccontrol/src/int_process.h
M proccontrol/src/linux.C
M proccontrol/src/linux.h
M proccontrol/src/process.C
M stackwalk/doc/3-API.tex
M stackwalk/doc/stackwalk.pdf
M symlite/h/SymLite-elf.h
M symlite/src/SymLite-elf.C
M symtabAPI/h/Symtab.h
M symtabAPI/h/SymtabReader.h
M symtabAPI/src/LineInformation.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object-nt.C
M symtabAPI/src/Object-nt.h
M symtabAPI/src/Object.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/SymtabReader.C
Log Message:
-----------
Merge branch 'master' into release9.2/fixes/fleece-decoding-issues
Commit: db74fc3dde3bdcb3fb071fc701ad32051434ed72
https://github.com/dyninst/dyninst/commit/db74fc3dde3bdcb3fb071fc701ad32051434ed72
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-22 (Tue, 22 Nov 2016)
Changed paths:
M instructionAPI/h/Operand.h
Log Message:
-----------
Cherry picked missing commits from att_syntax:
- AT&T syntax for x86_64 should be on par with libopcodes.
Commit: add1defa388a729a8a1a9db769b72ec943999f60
https://github.com/dyninst/dyninst/commit/add1defa388a729a8a1a9db769b72ec943999f60
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-22 (Tue, 22 Nov 2016)
Changed paths:
M instructionAPI/h/Register.h
Log Message:
-----------
Removed depricated attribute -- fix for AppVeyor
Commit: cd0cb3155d9f639d3312a283ef1e0b8090aeb077
https://github.com/dyninst/dyninst/commit/cd0cb3155d9f639d3312a283ef1e0b8090aeb077
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-22 (Tue, 22 Nov 2016)
Changed paths:
M instructionAPI/h/Register.h
Log Message:
-----------
att_syntax is the main branch for AT&T syntax updates again.
Removed depricated attribute -- fix for AppVeyor
Commit: 271c8de42dfc798e7e1f0ff00d8e5ed1fe6254b7
https://github.com/dyninst/dyninst/commit/271c8de42dfc798e7e1f0ff00d8e5ed1fe6254b7
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-22 (Tue, 22 Nov 2016)
Log Message:
-----------
Merge branch 'att_syntax_formerge' into att_syntax
Commit: 5756335e0f6dc9d34530fdef8b3a08c983dcd4e6
https://github.com/dyninst/dyninst/commit/5756335e0f6dc9d34530fdef8b3a08c983dcd4e6
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-28 (Mon, 28 Nov 2016)
Changed paths:
M cmake/shared.cmake
M cmake/warnings.cmake
M common/h/entryIDs.h
M common/src/arch-x86.C
M dynC_API/src/C.y
M dynC_API/src/dynC.tab.C
M dynC_API/src/dynC.tab.h
M instructionAPI/src/InstructionDecoder-x86.C
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Merge pull request #271 from dyninst/release9.2/fixes/fleece-decoding-issues
x86 decoding and syntax fixes -- tentative
Commit: eea25e40d3ee2ec3bab3252b7d5731c9130d1ddb
https://github.com/dyninst/dyninst/commit/eea25e40d3ee2ec3bab3252b7d5731c9130d1ddb
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-11-29 (Tue, 29 Nov 2016)
Changed paths:
M common/h/entryIDs.h
M common/src/arch-x86.C
Log Message:
-----------
Fixes for all but one of Nathan's x86 issues.
Commit: f236c311f4e41b17595e6d7266a8974a10df7f72
https://github.com/dyninst/dyninst/commit/f236c311f4e41b17595e6d7266a8974a10df7f72
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-11-30 (Wed, 30 Nov 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #233 ([ARM Decoding] Bad shift amounts.)
Mark ADD/SUB shoted-register variants and logical shifted-register variants as invalid if shift amount is reserved.
Commit: 409263315ff647c8ea180fd28d21f91548ca9fe5
https://github.com/dyninst/dyninst/commit/409263315ff647c8ea180fd28d21f91548ca9fe5
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-01 (Thu, 01 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/aarch64_opcode_tables.C
Log Message:
-----------
Issue #238 ([ARM Decoding] We should print the full operands of PRFUM)
Fix destination and second source operand parsing for PRFUM.
Commit: 60416ae685b3f3ce0580c9721a1c11898e4c9ec0
https://github.com/dyninst/dyninst/commit/60416ae685b3f3ce0580c9721a1c11898e4c9ec0
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-01 (Thu, 01 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #240 ([ARM Decoding] Convert instruction immediate should not be larger than the register size)
Mark fixed-point to floating point conversion instructions with bit<31>
= 0 and bit<15> = 0 as invalid.
Commit: d4c5b36b777fc067fcc58ef991b144828b20e5ab
https://github.com/dyninst/dyninst/commit/d4c5b36b777fc067fcc58ef991b144828b20e5ab
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-01 (Thu, 01 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #241 ([ARM Decoding] Convert instruction immediates appear
incorrect at 64)
Use different number of bits for size of 'fbits' operand in 32 vs 64 bit
modes of the scalar to fixed-point FP instructions.
Commit: 8012061aa80b44d6ac176b4662f33bbe52e4c2b1
https://github.com/dyninst/dyninst/commit/8012061aa80b44d6ac176b4662f33bbe52e4c2b1
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/InstructionDecoder-aarch64.h
Log Message:
-----------
Issue #245 (ARM Decoding] Paired memory accesses must access aligned
memory)
Detect invalid instructions in the load/store pair and load/store non-temporal pair categories.
Commit: fadf29ca5b9615d35f0889e88b277a066b7414df
https://github.com/dyninst/dyninst/commit/fadf29ca5b9615d35f0889e88b277a066b7414df
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M cmake/shared.cmake
M cmake/warnings.cmake
M common/src/linuxKludges.C
M dataflowAPI/src/stackanalysis.C
M dynC_API/src/C.y
M dynC_API/src/dynC.tab.C
M dynC_API/src/dynC.tab.h
M dyninstAPI/src/BPatch_addressSpace.C
M dyninstAPI/src/BPatch_type.C
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/function.C
M dyninstAPI/src/image.C
M dyninstAPI/src/inst-power.C
M instructionAPI/src/InstructionDecoder-aarch64.C
M parseAPI/src/IA_powerDetails.C
M parseThat/src/dyninstCore.C
M proccontrol/doc/proccontrol.docx
M proccontrol/doc/proccontrol.pdf
M proccontrol/src/DecoderWindows.C
M proccontrol/src/process.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/emitElf.C
M symtabAPI/src/relocationEntry-elf-aarch64.C
Log Message:
-----------
Merge branch 'master' into att_syntax
Commit: 7f7d858a4f41fd50c148d6e033e66f92f2e6f9fb
https://github.com/dyninst/dyninst/commit/7f7d858a4f41fd50c148d6e033e66f92f2e6f9fb
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M common/h/entryIDs.h
M common/src/arch-x86.C
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/InstructionDecoder-aarch64.h
M instructionAPI/src/InstructionDecoder-x86.C
M instructionAPI/src/aarch64_opcode_tables.C
Log Message:
-----------
Merge branch 'att_syntax' of http://github.com/dyninst/dyninst into att_syntax
Commit: 3e33a1b000be25a69ce5e95db20b069509e22a49
https://github.com/dyninst/dyninst/commit/3e33a1b000be25a69ce5e95db20b069509e22a49
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-03 (Sat, 03 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #247 ([ARM Decoding] Signed multiply instructions ignore size
resitrictions)
If 'size' is 3 for SIMD scalar 3 different category instructions, the
instruction should be invalid.
Commit: 9fd5b32c52bbac9d52937aabf3a6a63b83ee6ce5
https://github.com/dyninst/dyninst/commit/9fd5b32c52bbac9d52937aabf3a6a63b83ee6ce5
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-03 (Sat, 03 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #248 ([ARM Decoding] Stack pointer used where zero register should
be)
Third source register should be the zero register, not stack pointer, when 'Ra' is 31.
Commit: 350ec13fa36585568f94765c1e2506fda8ed3510
https://github.com/dyninst/dyninst/commit/350ec13fa36585568f94765c1e2506fda8ed3510
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-08 (Thu, 08 Dec 2016)
Changed paths:
M common/src/arch-x86.C
Log Message:
-----------
Working on adding generated instruction decorations
Commit: 39caf8e24551071b3e806128dfdd1de50eed0514
https://github.com/dyninst/dyninst/commit/39caf8e24551071b3e806128dfdd1de50eed0514
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-08 (Thu, 08 Dec 2016)
Changed paths:
M common/src/arch-x86.C
M instructionAPI/src/InstructionDecoder-x86.C
Log Message:
-----------
More testsuite fixes
Commit: 6de9520685215edbe1eb793ac38e8f0c3792a611
https://github.com/dyninst/dyninst/commit/6de9520685215edbe1eb793ac38e8f0c3792a611
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-14 (Wed, 14 Dec 2016)
Changed paths:
M common/src/arch-x86.C
Log Message:
-----------
Suppressed debug output
Commit: 7c0cfd436ab3edaa5ed3b1799f2ff4006c68c242
https://github.com/dyninst/dyninst/commit/7c0cfd436ab3edaa5ed3b1799f2ff4006c68c242
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-19 (Mon, 19 Dec 2016)
Changed paths:
M cmake/packages.cmake
M common/doc/manual_frontpage.tex
M common/h/dyn_regs.h
M common/src/dyn_regs.C
M dataflowAPI/doc/dataflowAPI.pdf
M dataflowAPI/h/SymEval.h
M dataflowAPI/rose/semantics/BaseSemantics2.C
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/src/AbslocInterface.C
M dataflowAPI/src/ExpressionConversionVisitor.C
M dataflowAPI/src/RoseImpl.C
M dataflowAPI/src/SymbolicExpansion.C
M dataflowAPI/src/slicing.C
M dataflowAPI/src/stackanalysis.C
M dyninstAPI/doc/dyninstAPI.doc
M dyninstAPI/doc/dyninstAPI.pdf
M elf/src/Elf_X.C
M external/rose/armv8InstructionEnum.h
M instructionAPI/doc/1-Intro.tex
M instructionAPI/doc/instructionAPI.pdf
M instructionAPI/src/InstructionDecoder-aarch64.C
M parseAPI/doc/1-Intro.tex
M parseAPI/doc/parseAPI.pdf
M parseAPI/h/CodeSource.h
M parseAPI/src/BoundFactCalculator.C
M parseAPI/src/BoundFactData.C
M parseAPI/src/BoundFactData.h
M parseAPI/src/CodeObject.C
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_aarch64.C
M parseAPI/src/IA_powerDetails.C
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectASTVisitor.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/InstructionSource-aarch64.C
M parseAPI/src/JumpTablePred.C
M parseAPI/src/JumpTablePred.h
M parseAPI/src/SymtabCodeSource.C
M parseAPI/src/debug_parse.C
M parseAPI/src/debug_parse.h
M patchAPI/doc/patchAPI.pdf
M proccontrol/doc/proccontrol.docx
M proccontrol/doc/proccontrol.pdf
M symtabAPI/doc/1-Intro.tex
M symtabAPI/doc/2-Abstractions.tex
M symtabAPI/doc/API/LineInfo/Iterating.tex
M symtabAPI/doc/symtabAPI.pdf
M symtabAPI/h/Module.h
M symtabAPI/src/LineInformation.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
Merge branch 'master' of http://github.com/dyninst/dyninst into att_syntax_merge
Commit: fea0fdbef2bfd52c019bfe1962654bc6803f13d1
https://github.com/dyninst/dyninst/commit/fea0fdbef2bfd52c019bfe1962654bc6803f13d1
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-19 (Mon, 19 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #249 (Reserved size value for some vector register instructions is
ignored)
Check for invalid 'S' and 'size' field values for SIMD scalar three-same
instructions
Commit: d62aa74cccaefec1f35a109b481e64cf7c50bee3
https://github.com/dyninst/dyninst/commit/d62aa74cccaefec1f35a109b481e64cf7c50bee3
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-19 (Mon, 19 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Updated invalid instruction detection code for SIMD scalar three-same
and SIMD scalar two-register miscellaneous instruction categories.
Commit: 2602a5181d78002d62b6bc7ae81e6a1824b16b40
https://github.com/dyninst/dyninst/commit/2602a5181d78002d62b6bc7ae81e6a1824b16b40
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-19 (Mon, 19 Dec 2016)
Changed paths:
M common/src/arch-x86.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M instructionAPI/src/InstructionDecoder-x86.C
Log Message:
-----------
Working on adding implicit operands and decoration descriptors to ia32_entry
Commit: 6397092bc1c9b13b2fe2bac2aa7ab7c561a20990
https://github.com/dyninst/dyninst/commit/6397092bc1c9b13b2fe2bac2aa7ab7c561a20990
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-19 (Mon, 19 Dec 2016)
Changed paths:
M common/src/arch-x86.C
Log Message:
-----------
Added extra element to ia32_entrys
Commit: ff02d91e5dd52e1f4efb3045d6e5c9924c6890a8
https://github.com/dyninst/dyninst/commit/ff02d91e5dd52e1f4efb3045d6e5c9924c6890a8
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-19 (Mon, 19 Dec 2016)
Changed paths:
M common/src/arch-x86.C
M common/src/dyn_regs.C
Log Message:
-----------
Warning fixes
Commit: 6fac70473bd577d290ca3f6bd161338fc0a64ac2
https://github.com/dyninst/dyninst/commit/6fac70473bd577d290ca3f6bd161338fc0a64ac2
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-19 (Mon, 19 Dec 2016)
Changed paths:
M cmake/warnings.cmake
M dataflowAPI/h/AbslocInterface.h
M dataflowAPI/h/stackanalysis.h
M dataflowAPI/rose/x86_64InstructionSemantics.h
M dataflowAPI/src/AbslocInterface.C
M dataflowAPI/src/stackanalysis.C
M dyninstAPI/src/MemoryEmulator/memEmulatorTransformer.h
M dyninstAPI/src/Relocation/CFG/RelocGraph.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.h
M dyninstAPI/src/addressSpace.h
M dyninstAPI/src/binaryEdit.h
M dyninstAPI/src/dynProcess.h
M dyninstAPI/src/hybridOverwrites.C
M dyninstAPI/src/image.C
M dyninstAPI/src/linux.C
M dyninstAPI/src/pdwinnt.C
M dyninstAPI/src/unix.C
M elf/src/Elf_X.C
M parseAPI/src/Function.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Symtab.C
Log Message:
-----------
Merge branch 'master' into att_syntax
Commit: 5e2a6d0ae38b4a795f6edb8f03ab5997a93dad14
https://github.com/dyninst/dyninst/commit/5e2a6d0ae38b4a795f6edb8f03ab5997a93dad14
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-20 (Tue, 20 Dec 2016)
Changed paths:
M common/src/arch-x86.h
M instructionAPI/src/InstructionDecoder-x86.C
Log Message:
-----------
working on converting to new implicit operand descriptions
Commit: fcfc2f335763c0f276c096ea25839263b7dfdaa3
https://github.com/dyninst/dyninst/commit/fcfc2f335763c0f276c096ea25839263b7dfdaa3
Author: John Detter <jdetter@xxxxxxxx>
Date: 2016-12-20 (Tue, 20 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Merge branch 'att_syntax' of http://github.com/dyninst/dyninst into att_syntax
Commit: 5cc151bb4b5c1261f2be333b01fd91167ec1e44a
https://github.com/dyninst/dyninst/commit/5cc151bb4b5c1261f2be333b01fd91167ec1e44a
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-20 (Tue, 20 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #253 (Floating point instructions can have mismatched operand sizes)
For all instructions except FCVT, a 'type' field value greater than 1 should render the instruction invalid. The 'opc' field is used only for FCVT to determine only the destination register. All other instructions and operands use solely the 'type' field to determine source/destination registers.
This commit also fixes Issue #254.
Commit: aa9539368ffa549ad945ad9df8128db7dbd89fa3
https://github.com/dyninst/dyninst/commit/aa9539368ffa549ad945ad9df8128db7dbd89fa3
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-21 (Wed, 21 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #257 ([ARM Decoding] Convert instruction immediate has reserved
values (currently ignored)
For the SIMD shift by immediate category (both scalar and non-scalar), value of the 'immh' field should determine whether or not an instruction
is invalid.
Commit: bdd6c9754a96818faf12218bbaf65d305c41fad8
https://github.com/dyninst/dyninst/commit/bdd6c9754a96818faf12218bbaf65d305c41fad8
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-21 (Wed, 21 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #258 ([ARM Decoding] FMUL instructions cannot have 'size:L' ==
'11')
A subset of instructions in the SIMD scalar x-indexed element category
should be invalid if bit 0 of the 'size' field and the 'L' field are
both 1.
Commit: 6ab9302f30081548a14f14b48f026da4319ad9ac
https://github.com/dyninst/dyninst/commit/6ab9302f30081548a14f14b48f026da4319ad9ac
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-22 (Thu, 22 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #262 ([ARMv8 Decoding] FMUL instruction cannot have size:q = '10')
SIMD vector x-indexed instructions that use the 'sz' field should be
invalid for a certain combination of the values of the 'sz', 'L' and 'Q'
fields.
Commit: c3b108218fc2985b88a485c8b9a62364270d9a46
https://github.com/dyninst/dyninst/commit/c3b108218fc2985b88a485c8b9a62364270d9a46
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-22 (Thu, 22 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #266 ([ARMv8 Decoding] SMADDL and SMSUBL should have 32-bit
register for operands 2 and 3)
SMADDL, SMSUBL, UMADDL, UMSUBL are the only instructions in the data
processing 3-source category that should use 32-bit registers for the
first and second source operands.
Commit: 4ec677a01ef566c4a5713255c1fa7d390009aefe
https://github.com/dyninst/dyninst/commit/4ec677a01ef566c4a5713255c1fa7d390009aefe
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-12-22 (Thu, 22 Dec 2016)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/InstructionDecoder-aarch64.h
Log Message:
-----------
Append "2" to the mnemonic of SIMD instructions that operate on the
upper 64-bits of the registers holding narrower elements.
Also fixes issues #269 and #255.
Commit: c72ed8c019b0c6d29fad858612741164f3dceb97
https://github.com/dyninst/dyninst/commit/c72ed8c019b0c6d29fad858612741164f3dceb97
Author: John Detter <jdetter@xxxxxxxx>
Date: 2017-01-10 (Tue, 10 Jan 2017)
Changed paths:
M common/src/arch-x86.C
M common/src/arch-x86.h
M instructionAPI/src/InstructionDecoder-x86.C
Log Message:
-----------
Marking more operands as implicit
Commit: 7365b789967400162f49c7ce21ee1605bcc8ab37
https://github.com/dyninst/dyninst/commit/7365b789967400162f49c7ce21ee1605bcc8ab37
Author: John Detter <jdetter@xxxxxxxx>
Date: 2017-01-10 (Tue, 10 Jan 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/InstructionDecoder-aarch64.h
Log Message:
-----------
Merge branch 'att_syntax' of http://github.com/dyninst/dyninst into att_syntax
Commit: 01eabe08dfbe8afd78e7fe34ffef8c4bab50f816
https://github.com/dyninst/dyninst/commit/01eabe08dfbe8afd78e7fe34ffef8c4bab50f816
Author: John Detter <jdetter@xxxxxxxx>
Date: 2017-01-12 (Thu, 12 Jan 2017)
Changed paths:
M common/src/arch-x86.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-x86.C
Log Message:
-----------
Fixed some ModRM parsing issues reported by Nathan. Issue #203
Commit: 33ed4c86bffe65e9a63e96c93ff5768ad01760e7
https://github.com/dyninst/dyninst/commit/33ed4c86bffe65e9a63e96c93ff5768ad01760e7
Author: John Detter <jdetter@xxxxxxxx>
Date: 2017-01-12 (Thu, 12 Jan 2017)
Changed paths:
M common/src/arch-x86.C
Log Message:
-----------
Small operand ordering fix for vmovhpd
Commit: dd38bbb2f7b48949a8b10ab0e31c255306513a15
https://github.com/dyninst/dyninst/commit/dd38bbb2f7b48949a8b10ab0e31c255306513a15
Author: John Detter <jdetter@xxxxxxxx>
Date: 2017-01-17 (Tue, 17 Jan 2017)
Changed paths:
M common/src/arch-x86.C
Log Message:
-----------
Marked more floating point instructions with implicit operands
Commit: ce1e4a8cea956ca888b2d0be4a63b2db3f163ecf
https://github.com/dyninst/dyninst/commit/ce1e4a8cea956ca888b2d0be4a63b2db3f163ecf
Author: John Detter <jdetter@xxxxxxxx>
Date: 2017-01-17 (Tue, 17 Jan 2017)
Changed paths:
M README.md
M cmake/shared.cmake
M dyninstAPI/doc/dyninstAPI.doc
M dyninstAPI/doc/dyninstAPI.pdf
M dyninstAPI/src/Relocation/CFG/RelocGraph.C
M dyninstAPI/src/binaryEdit.C
M dyninstAPI/src/image.C
M parseAPI/src/IA_power.C
M proccontrol/src/linux.C
M stackwalk/src/aarch64-swk.C
M stackwalk/src/linux-swk.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
M symtabAPI/src/relocationEntry-elf-aarch64.C
Log Message:
-----------
Merge branch 'master' of http://github.com/dyninst/dyninst into att_syntax
Commit: 80160855979d65eb7e3c4be922bbd51fcd628684
https://github.com/dyninst/dyninst/commit/80160855979d65eb7e3c4be922bbd51fcd628684
Author: John Detter <jdetter@xxxxxxxx>
Date: 2017-01-19 (Thu, 19 Jan 2017)
Changed paths:
M common/src/arch-x86.C
Log Message:
-----------
All documented implicit operands have been added. This includes instructions from Volume II of Intel's basic manual and instructions from the instruction set extension manual.
Commit: ee5dad9a0df08dc91c727b8200be599ebe1cb29b
https://github.com/dyninst/dyninst/commit/ee5dad9a0df08dc91c727b8200be599ebe1cb29b
Author: John Detter <jdetter@xxxxxxxx>
Date: 2017-02-01 (Wed, 01 Feb 2017)
Changed paths:
M common/h/entryIDs.h
M common/src/arch-x86.C
Log Message:
-----------
getsec had no instruction name, added xrstors
Commit: 1e9233bd16a154b2743c4c9bef25503d3dbdbb8b
https://github.com/dyninst/dyninst/commit/1e9233bd16a154b2743c4c9bef25503d3dbdbb8b
Author: John Detter <jdetter@xxxxxxxx>
Date: 2017-02-01 (Wed, 01 Feb 2017)
Changed paths:
A common/docs/decoding_diagram.png
M common/src/arch-x86.C
Log Message:
-----------
Added more comments for Intel decoding, added decoding diagram for github wiki.
Commit: c60b009c29cf753081f2364f00ae7fddb1e8f824
https://github.com/dyninst/dyninst/commit/c60b009c29cf753081f2364f00ae7fddb1e8f824
Author: John Detter <jdetter@xxxxxxxx>
Date: 2017-02-02 (Thu, 02 Feb 2017)
Changed paths:
M common/src/arch-x86.C
Log Message:
-----------
Intel decoding documentation synced for Github
Commit: 6fc7b32685c7dd7ee602d6f574ef61df27aee43a
https://github.com/dyninst/dyninst/commit/6fc7b32685c7dd7ee602d6f574ef61df27aee43a
Author: John Detter <jdetter@xxxxxxxx>
Date: 2017-02-02 (Thu, 02 Feb 2017)
Changed paths:
M appveyor.yml
M cmake/packages.cmake
M common/h/dyntypes.h
M common/src/Types.h
M common/src/dyn_regs.C
M dataflowAPI/rose/semantics/BaseSemantics2.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dyninstAPI/h/BPatch_instruction.h
M dyninstAPI/h/BPatch_memoryAccess_NP.h
M dyninstAPI/h/BPatch_snippet.h
M dyninstAPI/src/BPatch_snippet.C
M dyninstAPI/src/Relocation/Widgets/StackModWidget.C
M dyninstAPI/src/codegen-x86.C
M dyninstAPI/src/hybridCallbacks.C
M dyninstAPI/src/inst-x86.C
M dyninstAPI/src/pdwinnt.C
M dyninstAPI_RT/src/RTthread-x86.c
M dyninstAPI_RT/src/RTwinnt.c
M parseAPI/src/IndirectASTVisitor.C
M proccontrol/src/DecoderWindows.C
M proccontrol/src/linux.C
M proccontrol/src/windows_thread.C
M stackwalk/src/x86-swk.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
Merge branch 'master' into att_syntax
Commit: 3a7f4010608c244189ffcc36c8fdf8596de3f700
https://github.com/dyninst/dyninst/commit/3a7f4010608c244189ffcc36c8fdf8596de3f700
Author: Nathan Jay <nholcomb@xxxxxxxx>
Date: 2017-03-01 (Wed, 01 Mar 2017)
Changed paths:
M instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/src/ArchSpecificFormatters.C
Log Message:
-----------
Added initial implementation of PPC specific formatter
Commit: 75b01af49c78f412760f784ce00a85bd4c9ee14b
https://github.com/dyninst/dyninst/commit/75b01af49c78f412760f784ce00a85bd4c9ee14b
Author: Nathan Jay <nholcomb@xxxxxxxx>
Date: 2017-03-01 (Wed, 01 Mar 2017)
Changed paths:
M instructionAPI/src/Instruction.C
Log Message:
-----------
Enabled PPC specifc formatter when using Arch_ppc64
Commit: 65a961b00ec8bb8058027ca1053cef3aaf2fff54
https://github.com/dyninst/dyninst/commit/65a961b00ec8bb8058027ca1053cef3aaf2fff54
Author: Nathan Jay <nholcomb@xxxxxxxx>
Date: 2017-03-01 (Wed, 01 Mar 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-power.C
Log Message:
-----------
Marked implicit update operands as implicit; marked implicit reference to cr0 as implicit
Commit: 5671665faee8f1e28be9b5f9ce18ce2d135fe59b
https://github.com/dyninst/dyninst/commit/5671665faee8f1e28be9b5f9ce18ce2d135fe59b
Author: Nathan Jay <nholcomb@xxxxxxxx>
Date: 2017-03-01 (Wed, 01 Mar 2017)
Changed paths:
M instructionAPI/src/power_opcode_tables.C
Log Message:
-----------
Changed operand order of RS and RA operands for logic instructions to reflect the manual.
Commit: 902c4d8516eb2016b332f0261c360e32515fbdc8
https://github.com/dyninst/dyninst/commit/902c4d8516eb2016b332f0261c360e32515fbdc8
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-03-07 (Tue, 07 Mar 2017)
Changed paths:
M symtabAPI/src/Type.C
Log Message:
-----------
Remove assert; simply delete iff refcount is zero. This should move to shared_ptr for 10.0.
Commit: 72a4f49743f1b7b917054489f09c8e2bfaafb811
https://github.com/dyninst/dyninst/commit/72a4f49743f1b7b917054489f09c8e2bfaafb811
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-03-09 (Thu, 09 Mar 2017)
Changed paths:
M common/h/dyntypes.h
M common/src/Types.h
M dyninstAPI/h/BPatch_instruction.h
M dyninstAPI/h/BPatch_memoryAccess_NP.h
M dyninstAPI/src/BPatch_memoryAccess.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
Log Message:
-----------
ABI fixes for 9.3.1 from scox@xxxxxxxxx
Commit: 3e726e82f3a4aa0ba4ad05d64838c285ceba4f7b
https://github.com/dyninst/dyninst/commit/3e726e82f3a4aa0ba4ad05d64838c285ceba4f7b
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-03-09 (Thu, 09 Mar 2017)
Changed paths:
M dyninstAPI/h/BPatch_type.h
M dyninstAPI/src/BPatch_type.C
Log Message:
-----------
Refactor BPatch_type so it always has a reference to its underlying symtab type.
Commit: f9abd6cc8808f2dbcd0618871e51165e6a716f95
https://github.com/dyninst/dyninst/commit/f9abd6cc8808f2dbcd0618871e51165e6a716f95
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-03-13 (Mon, 13 Mar 2017)
Changed paths:
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
Log Message:
-----------
Fix up exception handling code so that we only consider call instructions for exception sensitivity and its attendant emulation
Commit: 823ff23fcca5b84f3b05d24f24f4e0f7ca8647f1
https://github.com/dyninst/dyninst/commit/823ff23fcca5b84f3b05d24f24f4e0f7ca8647f1
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-03-13 (Mon, 13 Mar 2017)
Changed paths:
M appveyor.yml
Log Message:
-----------
Add cache entry for boost to appveyor config
Commit: 19b90bcef22ac76dda81600b0e2babe4638b5cc4
https://github.com/dyninst/dyninst/commit/19b90bcef22ac76dda81600b0e2babe4638b5cc4
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-03-14 (Tue, 14 Mar 2017)
Changed paths:
M cmake/DyninstConfig.cmake.in
M cmake/packages.cmake
Log Message:
-----------
CMake fixup: export C++ ABI settings for test suite to grab, and get boost from zipfile for better portability
Commit: e668cd27819186483e5965e852cb870dff24baa5
https://github.com/dyninst/dyninst/commit/e668cd27819186483e5965e852cb870dff24baa5
Author: Matt Morehouse <mm@xxxxxxxxxxx>
Date: 2017-03-15 (Wed, 15 Mar 2017)
Changed paths:
M dyninstAPI/src/Relocation/CFG/RelocBlock.C
Log Message:
-----------
Track relocated interprocedural edge targets as RelocBlocks.
Before only call edges had their targets tracked as RelocBlocks and
all other interprocedural edge targets were tracked as
block_instances.
Commit: ae6b4ec022c6e7a039348913127f98e0752391a6
https://github.com/dyninst/dyninst/commit/ae6b4ec022c6e7a039348913127f98e0752391a6
Author: Bill Williams <wwilliam47@xxxxxxxxx>
Date: 2017-03-20 (Mon, 20 Mar 2017)
Changed paths:
M cmake/DyninstConfig.cmake.in
M cmake/packages.cmake
Log Message:
-----------
Merge pull request #349 from dyninst/wrwilliams/cmake_fixup
CMake fixup
Commit: c6de82333ce99ad71f4ec500195ab5f815c49a78
https://github.com/dyninst/dyninst/commit/c6de82333ce99ad71f4ec500195ab5f815c49a78
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-03-23 (Thu, 23 Mar 2017)
Changed paths:
M dyninstAPI/src/binaryEdit.h
Log Message:
-----------
Fix for handling regions that have no disk backing
Commit: 85927e97f104f3066ceea4ae605c04378b890b51
https://github.com/dyninst/dyninst/commit/85927e97f104f3066ceea4ae605c04378b890b51
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-03-29 (Wed, 29 Mar 2017)
Changed paths:
M dyninstAPI/src/Parsing.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI/src/dynProcess.C
M dyninstAPI/src/pcEventMuxer.C
M symtabAPI/h/Function.h
M symtabAPI/h/Symtab.h
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object-nt.C
M symtabAPI/src/Object-nt.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElf.h
Log Message:
-----------
Assorted bug fixes; binary rewriting now tests clean locally again.
Commit: 561e1d915f2a173ec58a57cb3e4f116af51f7e1d
https://github.com/dyninst/dyninst/commit/561e1d915f2a173ec58a57cb3e4f116af51f7e1d
Author: Bill Williams <wwilliam47@xxxxxxxxx>
Date: 2017-03-29 (Wed, 29 Mar 2017)
Changed paths:
M dyninstAPI/h/BPatch_type.h
M dyninstAPI/src/BPatch_type.C
M dyninstAPI/src/Parsing.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI/src/binaryEdit.h
M dyninstAPI/src/dynProcess.C
M dyninstAPI/src/pcEventMuxer.C
M symtabAPI/h/Function.h
M symtabAPI/h/Symtab.h
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object-nt.C
M symtabAPI/src/Object-nt.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElf.h
Log Message:
-----------
Merge pull request #346 from dyninst/wrwilliams/owns_typ_fix
Refactor BPatch_type so it always has a reference to its underlying symtab type.
Commit: 8c69b0eb1ce2ebd9ff0132478d1a7d0be4c0cca7
https://github.com/dyninst/dyninst/commit/8c69b0eb1ce2ebd9ff0132478d1a7d0be4c0cca7
Author: Bill Williams <wwilliam47@xxxxxxxxx>
Date: 2017-03-29 (Wed, 29 Mar 2017)
Changed paths:
M appveyor.yml
M cmake/DyninstConfig.cmake.in
M cmake/packages.cmake
M dyninstAPI/h/BPatch_type.h
M dyninstAPI/src/BPatch_type.C
M dyninstAPI/src/Parsing.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI/src/binaryEdit.h
M dyninstAPI/src/dynProcess.C
M dyninstAPI/src/pcEventMuxer.C
M symtabAPI/h/Function.h
M symtabAPI/h/Symtab.h
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object-nt.C
M symtabAPI/src/Object-nt.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElf.h
Log Message:
-----------
Merge branch 'v9.3.x' into wrwilliams/exception_fixes
Commit: 9b2dd62c9b8b8ed2e87ea8ce000a7429d553cda7
https://github.com/dyninst/dyninst/commit/9b2dd62c9b8b8ed2e87ea8ce000a7429d553cda7
Author: Bill Williams <wwilliam47@xxxxxxxxx>
Date: 2017-04-04 (Tue, 04 Apr 2017)
Changed paths:
M dyninstAPI/src/Relocation/CFG/RelocBlock.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
Log Message:
-----------
Merge pull request #347 from dyninst/wrwilliams/exception_fixes
Fix up exception handling code so that we only consider call instructions for exception sensitivity and its attendant emulation
Commit: ad4acdfee1507a357913bda48cb8bf4715412836
https://github.com/dyninst/dyninst/commit/ad4acdfee1507a357913bda48cb8bf4715412836
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-04-12 (Wed, 12 Apr 2017)
Changed paths:
M CHANGELOG.md
Log Message:
-----------
Update changelog towards 9.3.2
Commit: 6a1f7340510b82e3585b42dcb0e9a85217b3993e
https://github.com/dyninst/dyninst/commit/6a1f7340510b82e3585b42dcb0e9a85217b3993e
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-04-12 (Wed, 12 Apr 2017)
Changed paths:
M dyninstAPI/src/codegen-power.C
Log Message:
-----------
PPC codegen fixes
Commit: 8bb1f27b0a069b1fe09618a301a3cb8baaf9996b
https://github.com/dyninst/dyninst/commit/8bb1f27b0a069b1fe09618a301a3cb8baaf9996b
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-04-12 (Wed, 12 Apr 2017)
Changed paths:
M instructionAPI/doc/API/Instruction.tex
Log Message:
-----------
Clarify effective address expressions.
Commit: ef3fcbeaaba6222fbb166e17932936c75486e540
https://github.com/dyninst/dyninst/commit/ef3fcbeaaba6222fbb166e17932936c75486e540
Author: Bill Williams <wwilliam47@xxxxxxxxx>
Date: 2017-04-13 (Thu, 13 Apr 2017)
Changed paths:
M CHANGELOG.md
M dyninstAPI/src/codegen-power.C
M instructionAPI/doc/API/Instruction.tex
Log Message:
-----------
Merge pull request #361 from dyninst/wrwilliams/cleanup-for-9.3.2
Final cleanup bits for 9.3.2
Commit: 1575b01d4f68121dd3e01be0c39e3158460e65df
https://github.com/dyninst/dyninst/commit/1575b01d4f68121dd3e01be0c39e3158460e65df
Author: Bill Williams <wwilliam47@xxxxxxxxx>
Date: 2017-04-14 (Fri, 14 Apr 2017)
Changed paths:
M dyninstAPI/src/codegen-power.C
Log Message:
-----------
Remove spurious LR save call
We're going through the trap code if we encounter a call with a live LR for now--of course that should really never be the case as it should be killed by the call instruction itself.
Commit: a0ced65275ce118e16f045e45dd8b586b7923f8d
https://github.com/dyninst/dyninst/commit/a0ced65275ce118e16f045e45dd8b586b7923f8d
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-04-17 (Mon, 17 Apr 2017)
Changed paths:
R .idea/deployment.xml
R .idea/webServers.xml
Log Message:
-----------
Remove IDE files
Commit: 43ec60d16b57adeff33e65c9310b42c39e79dbb7
https://github.com/dyninst/dyninst/commit/43ec60d16b57adeff33e65c9310b42c39e79dbb7
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-04-17 (Mon, 17 Apr 2017)
Changed paths:
R dyninstAPI/doc/dyninstAPI.doc
A dyninstAPI/doc/dyninstAPI.docx
M dyninstAPI/doc/dyninstAPI.pdf
Log Message:
-----------
Updated Dyninst manual.
Commit: 2e23c9527ddcdb36bd9906597fd58ca8928b67cf
https://github.com/dyninst/dyninst/commit/2e23c9527ddcdb36bd9906597fd58ca8928b67cf
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-04-17 (Mon, 17 Apr 2017)
Changed paths:
M cmake/shared.cmake
Log Message:
-----------
Bump patch version
Commit: 5d2ddacb273682daa014ae22f17f3575e05b411e
https://github.com/dyninst/dyninst/commit/5d2ddacb273682daa014ae22f17f3575e05b411e
Author: Bill Williams <wwilliam47@xxxxxxxxx>
Date: 2017-04-17 (Mon, 17 Apr 2017)
Changed paths:
R .idea/deployment.xml
R .idea/webServers.xml
M cmake/shared.cmake
R dyninstAPI/doc/dyninstAPI.doc
A dyninstAPI/doc/dyninstAPI.docx
M dyninstAPI/doc/dyninstAPI.pdf
Log Message:
-----------
Merge pull request #362 from dyninst/wrwilliams/cleanup-for-9.3.2
More 9.3.2 cleanup
Commit: f8ffd81aa5173f2f5897e2abd388eebaf6f09d84
https://github.com/dyninst/dyninst/commit/f8ffd81aa5173f2f5897e2abd388eebaf6f09d84
Author: Sunny Shah <shahsunny712@xxxxxxxxx>
Date: 2017-04-27 (Thu, 27 Apr 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Fixed invalid instruction detection for SIMD shifted immediate instructions
Certain set of instructions in the SIMD shifted immediate category were being detected as invalid, even though they were valid, due to an incorrect mask used to check the values of the immh field.
Commit: d574b0ff3e8ea091ed23e76d176794ce508db265
https://github.com/dyninst/dyninst/commit/d574b0ff3e8ea091ed23e76d176794ce508db265
Author: Sunny Shah <shahsunny712@xxxxxxxxx>
Date: 2017-04-28 (Fri, 28 Apr 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Mark implicit registers
Added marking of implicit registers as implicit to prevent them from being printed in the disassembly.
Commit: 6219243e6e2fd10955a8bae153f134d6ad1b311d
https://github.com/dyninst/dyninst/commit/6219243e6e2fd10955a8bae153f134d6ad1b311d
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-04-28 (Fri, 28 Apr 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #234 (Invalid Subtract instruction)
The imm3 field for ADD/SUB extended variants should be in the range 0-4.
Commit: 1eff200c1158f645f1842be92771c00289a124bf
https://github.com/dyninst/dyninst/commit/1eff200c1158f645f1842be92771c00289a124bf
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-05-02 (Tue, 02 May 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/InstructionDecoder-aarch64.h
Log Message:
-----------
Issues #235(SQSHL instruction has invalid bits set ) and #236(Compare instructions with zero ignore reserved bits)
Added a new method to perform a check on invalid bits for certain instructions before processing their operands.
Commit: 5e63e682ad6d46d0031939f0785dad2d068839bb
https://github.com/dyninst/dyninst/commit/5e63e682ad6d46d0031939f0785dad2d068839bb
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-05-03 (Wed, 03 May 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issues #237 (Should print zero immediate for compares)
Zero variants of some SIMD/FP compare instructions as well as a few other instructions in the SIMD 2-register miscellaneous category should have a zero operand.
Commit: a973ef698ba22faaa658f4087541f2d7a7ef7d59
https://github.com/dyninst/dyninst/commit/a973ef698ba22faaa658f4087541f2d7a7ef7d59
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-05-03 (Wed, 03 May 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Fixes for issues #246 (REV64 instruction operand 1 should be integer register, not vector) and #250 (Reserved value for register shift field should create invalid insn)
Commit: 04abd1ce81c389fdd84d533dd1d9730b8ac7ab9e
https://github.com/dyninst/dyninst/commit/04abd1ce81c389fdd84d533dd1d9730b8ac7ab9e
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-05-03 (Wed, 03 May 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #251 (Some compare instructions should be invalid)
Check opcode bits for any SIMD/FP compare instruction.
Commit: 48fa64f9f12b810c827034ee312823346cd7fe14
https://github.com/dyninst/dyninst/commit/48fa64f9f12b810c827034ee312823346cd7fe14
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-05-04 (Thu, 04 May 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/InstructionDecoder-aarch64.h
Log Message:
-----------
Issue #264 (SHA instruction should have 0s for bits 20 and 22)
This fix should cover all SHA instructions in the SIMD category.
Commit: ff4ffd9d49b07d471c3f20dedd376fccaab5430d
https://github.com/dyninst/dyninst/commit/ff4ffd9d49b07d471c3f20dedd376fccaab5430d
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-05-04 (Thu, 04 May 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch64.C
Log Message:
-----------
Issue #269 (SQRSHRN should be SQRSHRN2)
In addition to bit 30 being 1, bit 28 should also be 0 before a check for adding "2" to the mnemonic is made.
Commit: c10d781fd967b0ac10ab5a65258fe91043c42343
https://github.com/dyninst/dyninst/commit/c10d781fd967b0ac10ab5a65258fe91043c42343
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-05-05 (Fri, 05 May 2017)
Changed paths:
M .travis.yml
A CHANGELOG.md
R LGPL
A LICENSE.md
M cmake/Modules/FindLibElf.cmake
M cmake/packages.cmake
M cmake/shared.cmake
M common/h/IBSTree-fast.h
M common/h/dyntypes.h
M common/src/Types.h
M common/src/addrtranslate-sysv.C
M dataflowAPI/h/ABI.h
M dataflowAPI/h/stackanalysis.h
M dataflowAPI/src/ABI.C
M dataflowAPI/src/RegisterMap.C
M dataflowAPI/src/liveness.C
M dataflowAPI/src/stackanalysis.C
M dyninstAPI/h/BPatch_instruction.h
M dyninstAPI/h/BPatch_memoryAccess_NP.h
M dyninstAPI/h/BPatch_type.h
M dyninstAPI/src/BPatch.C
M dyninstAPI/src/BPatch_collections.C
M dyninstAPI/src/BPatch_memoryAccess.C
M dyninstAPI/src/BPatch_object.C
M dyninstAPI/src/BPatch_type.C
M dyninstAPI/src/Relocation/CFG/RelocBlock.C
M dyninstAPI/src/Relocation/CFG/RelocGraph.C
M dyninstAPI/src/Relocation/CodeBuffer.C
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.h
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI/src/StackMod/StackAccess.C
M dyninstAPI/src/StackMod/StackAccess.h
M dyninstAPI/src/StackMod/StackModChecker.C
M dyninstAPI/src/codegen-x86.C
M dyninstAPI/src/codegen.C
M dyninstAPI/src/function.C
M dyninstAPI/src/function.h
M dyninstAPI/src/image.C
M dyninstAPI/src/linux-aarch64.C
M parseAPI/src/BoundFactCalculator.C
M parseAPI/src/BoundFactData.C
M parseAPI/src/IndirectASTVisitor.C
M stackwalk/src/linux-swk.C
M symtabAPI/h/Symtab.h
M symtabAPI/src/Aggregate.C
M symtabAPI/src/Collections.C
M symtabAPI/src/Module.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Type.C
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
Merge remote-tracking branch 'origin/master' into att_syntax
Commit: 69728a4e68bd4b46f7c137bf48ea73d564fdc55c
https://github.com/dyninst/dyninst/commit/69728a4e68bd4b46f7c137bf48ea73d564fdc55c
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-07-06 (Thu, 06 Jul 2017)
Changed paths:
M dyninstAPI/src/dynProcess.C
M dyninstAPI/src/pcEventHandler.C
M dyninstAPI/src/pcEventMuxer.C
Log Message:
-----------
Fixing the destruction of objects under process control api.
Commit: 1fb3b48d3095b41b16fbb5c3b212f717951ccb11
https://github.com/dyninst/dyninst/commit/1fb3b48d3095b41b16fbb5c3b212f717951ccb11
Author: Sasha NÃcolas <sasha.nicolas@xxxxxxxxx>
Date: 2017-07-07 (Fri, 07 Jul 2017)
Changed paths:
M dyninstAPI/src/dynProcess.C
M dyninstAPI/src/pcEventHandler.C
M dyninstAPI/src/pcEventMuxer.C
Log Message:
-----------
Merge pull request #382 from dyninst/sasha/process_control_fix
Fixing the destruction of objects under process control api.
Commit: 29dda00a09394fa9bb37d8f88c0825d99e7d5414
https://github.com/dyninst/dyninst/commit/29dda00a09394fa9bb37d8f88c0825d99e7d5414
Author: Ray Chen <rchen@xxxxxxxxxx>
Date: 2017-07-11 (Tue, 11 Jul 2017)
Changed paths:
R instructionAPI/aarch64_manual_parser.py
R instructionAPI/aarch64_sysreg_builder.py
A instructionAPI/arm_manual_parser.py
A instructionAPI/arm_sysreg_builder.py
Log Message:
-----------
Update ARM XML parsing scripts to handle AArch32.
These scripts are now executable and read the target directory (and if
necessary, the target architecture) as parameters.
Commit: 47179a2e16dcbd6d70ad048596349206801c6993
https://github.com/dyninst/dyninst/commit/47179a2e16dcbd6d70ad048596349206801c6993
Author: John Detter <john@xxxxxxxxxx>
Date: 2017-07-22 (Sat, 22 Jul 2017)
Changed paths:
M common/src/arch-x86.C
M instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/InstructionDecoder-x86.C
Log Message:
-----------
Cleaned up, verified ModR/M parsing in common/arch-x86.C and in instructionAPI
Commit: d0160a877e65f8a6ce562d94af67d3a6b54cb935
https://github.com/dyninst/dyninst/commit/d0160a877e65f8a6ce562d94af67d3a6b54cb935
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-08-09 (Wed, 09 Aug 2017)
Changed paths:
M symtabAPI/src/LineInformation.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Symtab.C
Log Message:
-----------
Fix line info lookup by file/line
Commit: 901ebfbe2dded83ddba9c3cd179713af44d60d8d
https://github.com/dyninst/dyninst/commit/901ebfbe2dded83ddba9c3cd179713af44d60d8d
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-08-09 (Wed, 09 Aug 2017)
Changed paths:
M symtabAPI/src/LineInformation.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Symtab.C
Log Message:
-----------
Merge commit 'd0160a8' into v9.3.x
Commit: 321ebfab16f47bab872b29959e4e3e0a6fb64a4e
https://github.com/dyninst/dyninst/commit/321ebfab16f47bab872b29959e4e3e0a6fb64a4e
Author: John Detter <john@xxxxxxxxxx>
Date: 2017-08-12 (Sat, 12 Aug 2017)
Changed paths:
M .gitignore
M common/src/arch-x86.C
Log Message:
-----------
Fix for AVX512 version of vcvtsi2sd
Commit: 0e45e60f8b44bf29bc1e22d49a331a712ba4598f
https://github.com/dyninst/dyninst/commit/0e45e60f8b44bf29bc1e22d49a331a712ba4598f
Author: John Detter <john@xxxxxxxxxx>
Date: 2017-08-12 (Sat, 12 Aug 2017)
Changed paths:
M .gitignore
M common/src/arch-x86.C
Log Message:
-----------
Merge branch 'att_syntax' into release10.0/fixes/372
Commit: 1068b53b85aea7a84241b125ed3f53867182ec4b
https://github.com/dyninst/dyninst/commit/1068b53b85aea7a84241b125ed3f53867182ec4b
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M common/h/Graph.h
M common/src/Graph.C
M dataflowAPI/h/slicing.h
M dataflowAPI/src/slicing.C
M parseAPI/CMakeLists.txt
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectASTVisitor.h
M parseAPI/src/IndirectAnalyzer.C
A parseAPI/src/JumpTableFormatPred.C
A parseAPI/src/JumpTableFormatPred.h
M parseAPI/src/JumpTablePred.C
A parseAPI/src/SymbolicExpression.C
A parseAPI/src/SymbolicExpression.h
Log Message:
-----------
Start to split jump table analysis to two different slices.
1. Jump table format slice. This commit contains its initial implementation
2. Jump table index slice. To be done
Commit: f87d17ac036c1cc20b206698130d2f5a1c3b6a43
https://github.com/dyninst/dyninst/commit/f87d17ac036c1cc20b206698130d2f5a1c3b6a43
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M dataflowAPI/h/slicing.h
M parseAPI/CMakeLists.txt
M parseAPI/src/BoundFactCalculator.C
M parseAPI/src/BoundFactCalculator.h
M parseAPI/src/BoundFactData.C
M parseAPI/src/BoundFactData.h
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectASTVisitor.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/IndirectAnalyzer.h
M parseAPI/src/JumpTableFormatPred.C
M parseAPI/src/JumpTableFormatPred.h
A parseAPI/src/JumpTableIndexPred.C
A parseAPI/src/JumpTableIndexPred.h
R parseAPI/src/JumpTablePred.C
R parseAPI/src/JumpTablePred.h
Log Message:
-----------
Initial implementation of jump table index slice. Basically reusing lots of code of from class JumpTablePred.
As we only track value bound for the index variable, we only need struct StridedInterval and there is no need for struct BoundValue.
Commit: 578ff24aabc706cb2fbe335bcc258518958d2c13
https://github.com/dyninst/dyninst/commit/578ff24aabc706cb2fbe335bcc258518958d2c13
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M dataflowAPI/src/slicing.C
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectASTVisitor.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/IndirectAnalyzer.h
M parseAPI/src/JumpTableFormatPred.C
M parseAPI/src/JumpTableFormatPred.h
Log Message:
-----------
1. Refactor code of reading contents from jump tables and determining jump target by visiting the jump target AST.
2. Currently when backward slicing, a absloc that is written by call defined by abi will be killed, however, caller saved registers can/should survive
Commit: 6e7a1915750385cb4ff14a2a30d1310e8df464a0
https://github.com/dyninst/dyninst/commit/6e7a1915750385cb4ff14a2a30d1310e8df464a0
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M parseAPI/src/IndirectAnalyzer.C
Log Message:
-----------
Perform table scan when the jump table index bound is unknown
Commit: 3bd62f77a0e85cfb40ca047a8151597e4308c66e
https://github.com/dyninst/dyninst/commit/3bd62f77a0e85cfb40ca047a8151597e4308c66e
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTableFormatPred.C
M parseAPI/src/JumpTableFormatPred.h
Log Message:
-----------
Fix indirect jumps in variable argument functions, where there is no memory read
Commit: cca9c3caf0601a8f31815376c1b1a64dad6d46f3
https://github.com/dyninst/dyninst/commit/cca9c3caf0601a8f31815376c1b1a64dad6d46f3
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/IndirectAnalyzer.h
M parseAPI/src/JumpTableFormatPred.C
M parseAPI/src/JumpTableFormatPred.h
Log Message:
-----------
1. Allow jump targets to be from a jump table and multiple constant values2
2. Stop reading tables once one table entry leads to overlapping basic blocks
Commit: 6173d80b8b808174e19ac3e9b3d779ce14fc3f91
https://github.com/dyninst/dyninst/commit/6173d80b8b808174e19ac3e9b3d779ce14fc3f91
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M common/src/dyn_regs.C
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectASTVisitor.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTableFormatPred.C
Log Message:
-----------
1. On arm, indexing can be performed through shift left operations. Add code to check this case.
2. Better jump table format check
3. Only forbid a jump target when it causes overlapping instructions, so allow a jump target to split a basic block
Commit: 6ac4c79b4bb2f247034145202225c1af1082e18f
https://github.com/dyninst/dyninst/commit/6ac4c79b4bb2f247034145202225c1af1082e18f
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M dataflowAPI/h/slicing.h
M dataflowAPI/src/slicing.C
M parseAPI/h/CodeObject.h
M parseAPI/src/BoundFactData.C
M parseAPI/src/CodeObject.C
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTableFormatPred.C
M parseAPI/src/JumpTableFormatPred.h
M parseAPI/src/JumpTableIndexPred.C
M parseAPI/src/JumpTableIndexPred.h
M parseAPI/src/Parser.C
M parseAPI/src/Parser.h
Log Message:
-----------
Fixes for jump table analysis on ARM
1. Jump table format slice now correctly track through stack register spills
2. Disallow jump tagets to another function
Commit: 3e83b78911b2792a8f7dff2fb4545db7891280a1
https://github.com/dyninst/dyninst/commit/3e83b78911b2792a8f7dff2fb4545db7891280a1
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTableFormatPred.C
M parseAPI/src/JumpTableFormatPred.h
Log Message:
-----------
1. More strict check when searching for the instruction that spills register to stack
2. Add code for checking jump target for variable argument functions
Commit: a89ef4bf85eb9447eca213e0b767780df221eb0b
https://github.com/dyninst/dyninst/commit/a89ef4bf85eb9447eca213e0b767780df221eb0b
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M parseAPI/h/CodeSource.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTableFormatPred.C
M parseAPI/src/SymbolicExpression.C
M parseAPI/src/SymtabCodeSource.C
Log Message:
-----------
It is not a good idea to stop scanning jump table when an entry leads to an address in another function.
The reason is that the another function can have an overapproximated jump table scan, causing wrong function boundary.
New heurisitics:
if the indirect jump is in a function with a hint, and the indirect jump jumps to an adderss outside the range speicified by the hint, we stop
Commit: 48809444117b8463a20a6c840aa31a7648081e3c
https://github.com/dyninst/dyninst/commit/48809444117b8463a20a6c840aa31a7648081e3c
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M common/h/dyn_regs.h
R dataflowAPI/rose/powerpcInstructionSemantics.h
M dataflowAPI/rose/semantics/DispatcherARM64.C
A dataflowAPI/rose/semantics/DispatcherPowerpc.C
A dataflowAPI/rose/semantics/DispatcherPowerpc.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/Registers.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/src/ExpressionConversionVisitor.C
M dataflowAPI/src/RoseImpl.C
M dataflowAPI/src/RoseInsnFactory.C
M dataflowAPI/src/SymEval.C
M dataflowAPI/src/SymbolicExpansion.C
M dataflowAPI/src/SymbolicExpansion.h
M dataflowAPI/src/convertOpcodes.C
M external/rose/powerpcInstructionEnum.h
M parseAPI/CMakeLists.txt
Log Message:
-----------
Add initial code for power 32 semantics and symbolic expansion for power 64
Commit: b1c8cb0cedc0e8b6df70ff3ab394563046de2d5e
https://github.com/dyninst/dyninst/commit/b1c8cb0cedc0e8b6df70ff3ab394563046de2d5e
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M common/h/dyn_regs.h
M common/src/dyn_regs.C
M dataflowAPI/rose/semantics/DispatcherPowerpc.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/src/ExpressionConversionVisitor.C
M dataflowAPI/src/RoseInsnFactory.C
M dataflowAPI/src/SymEval.C
M dataflowAPI/src/SymbolicExpansion.C
M parseAPI/src/IA_powerDetails.C
M parseAPI/src/SymbolicExpression.C
Log Message:
-----------
1. Enables new jump table analysis for powerpc 2. Fix various inconsistency between Dyninst powerpc register representation and ROSE powerpc register representation 3. Fix various issues in converting Dyninst powerpc instructions to ROSE powerpc instructions
Commit: 4875ba0df882602566e8cbc74c5802b14f996835
https://github.com/dyninst/dyninst/commit/4875ba0df882602566e8cbc74c5802b14f996835
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M common/src/dyn_regs.C
M dataflowAPI/rose/semantics/DispatcherPowerpc.C
M dataflowAPI/src/ExpressionConversionVisitor.C
M dataflowAPI/src/RoseInsnFactory.C
M dataflowAPI/src/SymbolicExpansion.C
M parseAPI/src/BoundFactCalculator.C
M parseAPI/src/BoundFactData.C
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectASTVisitor.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTableFormatPred.C
M parseAPI/src/JumpTableFormatPred.h
M parseAPI/src/JumpTableIndexPred.C
M parseAPI/src/SymbolicExpression.C
Log Message:
-----------
Various changes for powerpc 64-bit jump table analysis
1. More fixes for conversion between Dyninst instructions and ROSE instructions
2. Add a few instruction semantics
3. Properly handle comparison and conditional jump for powerpc in jump table analysis
4. Handle rotate left operation in jump table analysis
5. Add support for power 64-bit on recognizing loading TOC pointers into R2. R2 is then often used to calculate the address of jump tables.
Commit: 3714412b11cba651806dd8be82d34b3b30d9c1c3
https://github.com/dyninst/dyninst/commit/3714412b11cba651806dd8be82d34b3b30d9c1c3
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M parseAPI/CMakeLists.txt
M parseAPI/src/Block.C
M parseAPI/src/CodeObject.C
M parseAPI/src/CodeSource.C
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_IAPI.h
M parseAPI/src/IA_aarch64.C
R parseAPI/src/IA_aarch64Details.C
R parseAPI/src/IA_aarch64Details.h
R parseAPI/src/IA_platformDetails.h
R parseAPI/src/IA_platformDetailsFactory.C
M parseAPI/src/IA_power.C
M parseAPI/src/IA_power.h
R parseAPI/src/IA_powerDetails.C
R parseAPI/src/IA_powerDetails.h
M parseAPI/src/IA_x86.C
R parseAPI/src/IA_x86Details.C
R parseAPI/src/IA_x86Details.h
M parseAPI/src/IndirectAnalyzer.C
R parseAPI/src/InstructionSource-aarch64.C
R parseAPI/src/InstructionSource-power.C
R parseAPI/src/InstructionSource-x86.C
M parseAPI/src/ParseData.C
M parseAPI/src/ParseData.h
M parseAPI/src/Parser-speculative.C
M parseAPI/src/Parser.C
M parseAPI/src/Parser.h
M parseAPI/src/ParserDetails.C
M parseAPI/src/ParserDetails.h
Log Message:
-----------
1. Fix tail call identification on power: tail call can target FEP or FEP + 8
2. Add class IA_x86, IA_power, IA_aarch64 to represent architecture specifics. These classes all extend IA_IAPI and are chosen at runtime depending on the arch enum of the analysis binary
3. Delete no longer used jump table heuristics
Commit: 95984812c88e8f648ef3473522e994bf1dbf8a5f
https://github.com/dyninst/dyninst/commit/95984812c88e8f648ef3473522e994bf1dbf8a5f
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
A parseAPI/src/IA_aarch64.h
A parseAPI/src/IA_x86.h
Log Message:
-----------
Add missed header files
Commit: 0600a498fd724570387d9431d83b1597737bb7c2
https://github.com/dyninst/dyninst/commit/0600a498fd724570387d9431d83b1597737bb7c2
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M parseAPI/h/CodeSource.h
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_InstrucIter.C
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/Parser.C
M parseAPI/src/SymtabCodeSource.C
M symtabAPI/h/Symtab.h
M symtabAPI/src/Object-elf.C
Log Message:
-----------
1. Enable exception blocks parsing on non-x86/64 architectures
2. Instead of trying to find catch blocks after CF instructions such as ret, jump,
and non-returning call, now if a call site is in a try block, then we parse the
corresponding catch block and create a catch edge from the call site to the catch block.
Commit: f4390bb5f9c1a40ef6e12f9a3350a0dbce7ffcd3
https://github.com/dyninst/dyninst/commit/f4390bb5f9c1a40ef6e12f9a3350a0dbce7ffcd3
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M dataflowAPI/rose/util/PoolAllocator.h
Log Message:
-----------
Fix uninitialized variables in ROSE Pool class
Commit: 74d71a7991707ba3cbe5bcb6cc8d9e0b478908b5
https://github.com/dyninst/dyninst/commit/74d71a7991707ba3cbe5bcb6cc8d9e0b478908b5
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-15 (Tue, 15 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherPowerpc.C
M instructionAPI/src/InstructionDecoder-power.C
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTableFormatPred.C
M parseAPI/src/JumpTableFormatPred.h
M parseAPI/src/SymbolicExpression.C
M parseAPI/src/SymbolicExpression.h
M symtabAPI/src/Object-elf.C
Log Message:
-----------
1. Add instruction semantics for powerpc ld
2. Properly use xlatetom to handle endianness
3. Improve identification of TOC base.
4. Allow reading jump table location from memory location
Commit: 0dbacdcb780eb8447de8344191ccd2d5702ad104
https://github.com/dyninst/dyninst/commit/0dbacdcb780eb8447de8344191ccd2d5702ad104
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-16 (Wed, 16 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherPowerpc.C
M dataflowAPI/src/AbslocInterface.C
M instructionAPI/src/InstructionDecoder-power.C
M instructionAPI/src/InstructionDecoder-power.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTableFormatPred.C
Log Message:
-----------
1. Fix a NULL pointer deference issue in JumpTableFormatPred.C
2. On powerpc, operand RA should be a destination operand when RS is present. This bug is exposed because the order of RA and RS changed from power2 to newer power version
3. Fix corresponding operand order issue in Powerpc instruction semantics
Commit: 8377b4c12456f235f0d34147aa37f7de49e46d06
https://github.com/dyninst/dyninst/commit/8377b4c12456f235f0d34147aa37f7de49e46d06
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M parseAPI/src/BoundFactCalculator.C
Log Message:
-----------
Fix memory leaks in indirect control flow.
Commit: b8330b631e6806dc47858d89b885af3c8a66dcae
https://github.com/dyninst/dyninst/commit/b8330b631e6806dc47858d89b885af3c8a66dcae
Author: Peter Foley <pefoley2@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/Collections.C
M symtabAPI/src/Type.C
Log Message:
-----------
fix memory leaks
Commit: 67287202e33877ecc1c1fbbaaa983b9cccc3bb9c
https://github.com/dyninst/dyninst/commit/67287202e33877ecc1c1fbbaaa983b9cccc3bb9c
Author: Peter Foley <pefoley2@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dyninstAPI/src/BPatch.C
M dyninstAPI/src/BPatch_type.C
M symtabAPI/src/Type.C
Log Message:
-----------
fix more leaks
Commit: a589681ea044a1e729efb7fc959351b9d7a06366
https://github.com/dyninst/dyninst/commit/a589681ea044a1e729efb7fc959351b9d7a06366
Author: Peter Foley <pefoley2@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dyninstAPI/h/BPatch_type.h
M dyninstAPI/src/BPatch.C
M dyninstAPI/src/BPatch_collections.C
M dyninstAPI/src/BPatch_type.C
Log Message:
-----------
more leak fixes
Commit: 49657266867b60d2d832ccebf16cc6a99f726535
https://github.com/dyninst/dyninst/commit/49657266867b60d2d832ccebf16cc6a99f726535
Author: Peter Foley <pefoley2@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M common/src/addrtranslate-sysv.C
M dyninstAPI/src/image.C
Log Message:
-----------
more leaks
Commit: 1ec1aacbcf65cc5eeefaebd81f4b800dc291c4d8
https://github.com/dyninst/dyninst/commit/1ec1aacbcf65cc5eeefaebd81f4b800dc291c4d8
Author: Itaru Kitayama <itaru.kitayama@xxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M stackwalk/src/linux-swk.C
Log Message:
-----------
Suppress debug message when no vsyscall page was found on arm64
Commit: 7ed0d40fa98a7fdf0375a72d88e04af734ddef64
https://github.com/dyninst/dyninst/commit/7ed0d40fa98a7fdf0375a72d88e04af734ddef64
Author: Itaru Kitayama <itaru.kitayama@xxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dyninstAPI/src/linux-aarch64.C
Log Message:
-----------
getOPDFunctionAddr() should always return a true value on arm64
Commit: 535795ee68d2035a739202272e2e244470cc4f10
https://github.com/dyninst/dyninst/commit/535795ee68d2035a739202272e2e244470cc4f10
Author: Itaru Kitayama <itaru.kitayama@xxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dataflowAPI/src/liveness.C
Log Message:
-----------
Use ifdef to guard x86 code
Commit: 76a181598dd7dae6f2d9a04fc26ff038c4405c7f
https://github.com/dyninst/dyninst/commit/76a181598dd7dae6f2d9a04fc26ff038c4405c7f
Author: Itaru Kitayama <itaru.kitayama@xxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dataflowAPI/src/RegisterMap.C
Log Message:
-----------
Add a mapping of AArch64 MachRegister to index for Linux
Commit: f1f358b5ce7f4e80c4ef44fd5935bdd2240b451e
https://github.com/dyninst/dyninst/commit/f1f358b5ce7f4e80c4ef44fd5935bdd2240b451e
Author: Itaru Kitayama <itaru.kitayama@xxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dyninstAPI/src/codegen.C
Log Message:
-----------
arm64: set number of regs defined in beginTrackRegDefs()
Commit: 472ca3053d55bf6121a1b4855f03ecfe63da6058
https://github.com/dyninst/dyninst/commit/472ca3053d55bf6121a1b4855f03ecfe63da6058
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M parseAPI/src/BoundFactData.C
M parseAPI/src/IndirectASTVisitor.C
Log Message:
-----------
A memory access to a known address should be considered as a variable, rather than a table read.
So, the jump table analysis should not try to read the content of the variable, but try to determine whether the variable is bounded
Commit: 8d3d4ccd380341929cbb8c604d4a2ddd9120a86c
https://github.com/dyninst/dyninst/commit/8d3d4ccd380341929cbb8c604d4a2ddd9120a86c
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
A CHANGELOG.md
M cmake/shared.cmake
Log Message:
-----------
Increment version and add changelog for 9.3.1
Commit: e09bbcddf2e622f8050156c4a9e3464c1fe6ecbe
https://github.com/dyninst/dyninst/commit/e09bbcddf2e622f8050156c4a9e3464c1fe6ecbe
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M CHANGELOG.md
Log Message:
-----------
Brought issues up to date and updated changelog accordingly.
Commit: d538f469f9d8941f8bf7d5293d1f92f893f0e985
https://github.com/dyninst/dyninst/commit/d538f469f9d8941f8bf7d5293d1f92f893f0e985
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M .gitignore
M INSTALL
M cmake/Modules/FindLibDwarf.cmake
M cmake/packages.cmake
M dataflowAPI/rose/semantics/MemoryMap.C
M dataflowAPI/rose/util/Message.C
M dwarf/h/dwarfExprParser.h
M dwarf/h/dwarfFrameParser.h
M dwarf/h/dwarfHandle.h
M dwarf/h/dwarfResult.h
M dwarf/src/dwarfExprParser.C
M dwarf/src/dwarfFrameParser.C
M dwarf/src/dwarfHandle.C
M dynC_API/src/dynC.tab.C
M dyninstAPI/src/emit-x86.C
M dyninstAPI/src/image.C
M stackwalk/src/dbginfo-stepper.C
M symtabAPI/doc/A-Appendix.tex
M symtabAPI/h/Module.h
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
M symtabAPI/src/parseDwarf.C
Log Message:
-----------
Starting to change the library used for dwarf parsin.
Commit: 0aa5b882938f7fbf4da0d93a5eb37464247ba358
https://github.com/dyninst/dyninst/commit/0aa5b882938f7fbf4da0d93a5eb37464247ba358
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dwarf/h/dwarfFrameParser.h
M dwarf/src/dwarfFrameParser.C
Log Message:
-----------
Fixing indentation
Commit: 65f2a286f749426769ce5d2f16204760ece13111
https://github.com/dyninst/dyninst/commit/65f2a286f749426769ce5d2f16204760ece13111
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dwarf/h/dwarfExprParser.h
M dwarf/h/dwarfFrameParser.h
M dwarf/h/dwarfHandle.h
M dwarf/src/dwarfExprParser.C
M dwarf/src/dwarfFrameParser.C
M dwarf/src/dwarfHandle.C
M symtabAPI/src/Object-elf.h
Log Message:
-----------
libdynDwarf is compiling now.
Commit: 340799a201f5f5294d6f2922f3bf6e75d43128ca
https://github.com/dyninst/dyninst/commit/340799a201f5f5294d6f2922f3bf6e75d43128ca
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M CMakeLists.txt
M cmake/Modules/FindLibDwarf.cmake
M cmake/packages.cmake
M dwarf/h/dwarfExprParser.h
M dwarf/h/dwarfFrameParser.h
M dwarf/h/dwarfHandle.h
M dwarf/h/dwarfResult.h
M dwarf/src/dwarfFrameParser.C
M dwarf/src/dwarfHandle.C
M dyninstAPI/h/BPatch.h
M dyninstAPI/src/image.C
M instructionAPI/src/Instruction.C
M parseAPI/src/CodeObject.C
M patchAPI/src/PatchMgr.C
M proccontrol/src/process.C
M stackwalk/h/walker.h
M stackwalk/src/dbginfo-stepper.C
M symtabAPI/h/Module.h
M symtabAPI/h/Symtab.h
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
M symtabAPI/src/parseDwarf.C
Log Message:
-----------
Adapting Object-elf.C
Commit: acf50ca38f3a40ec6c870ec821108a12865ed114
https://github.com/dyninst/dyninst/commit/acf50ca38f3a40ec6c870ec821108a12865ed114
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
Object-elf.C is compiling with some incomplete functions.
Commit: 972f41474b5e7ce9c2bb1ab5f303ad44f4d78afd
https://github.com/dyninst/dyninst/commit/972f41474b5e7ce9c2bb1ab5f303ad44f4d78afd
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
Log Message:
-----------
More changes in DwarfWalker.
Commit: ce09095833af35877f4b4e89e0baa15d3644414f
https://github.com/dyninst/dyninst/commit/ce09095833af35877f4b4e89e0baa15d3644414f
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
Some changes at the dwarfWalker.
Commit: 18278f6b4816d21f4dff56739bfe6efe5c3c0c16
https://github.com/dyninst/dyninst/commit/18278f6b4816d21f4dff56739bfe6efe5c3c0c16
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
Log Message:
-----------
New changes to adapt code to libdw.
Commit: e7d8a091caec60e639e1d0da11d22bd41b1273c2
https://github.com/dyninst/dyninst/commit/e7d8a091caec60e639e1d0da11d22bd41b1273c2
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dwarf/h/dwarfExprParser.h
M dwarf/h/dwarfFrameParser.h
M dwarf/h/dwarfHandle.h
M dwarf/h/dwarfResult.h
M dwarf/src/dwarfExprParser.C
M dwarf/src/dwarfFrameParser.C
M dwarf/src/dwarfHandle.C
M dwarf/src/dwarfResult.C
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/dbgstepper-impl.h
M symtabAPI/src/Function.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
M symtabAPI/src/parseDwarf.C
Log Message:
-----------
Adaptations done, but remain to be fixed at some points. Dyninst is compiling.
Commit: 3ffe4514cb4b9467ab42a4c48fbce6c56f7d5804
https://github.com/dyninst/dyninst/commit/3ffe4514cb4b9467ab42a4c48fbce6c56f7d5804
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Fixing assert.
Commit: a8e9a6590f34aacf91522d8aa927d4a478d94c50
https://github.com/dyninst/dyninst/commit/a8e9a6590f34aacf91522d8aa927d4a478d94c50
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
Log Message:
-----------
Fixing use of dwarf_nextcu.
Commit: 7f58620d8e42e13336c264e4f24e82f3733478ac
https://github.com/dyninst/dyninst/commit/7f58620d8e42e13336c264e4f24e82f3733478ac
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/h/Symtab.h
M symtabAPI/src/Aggregate.C
M symtabAPI/src/Module.C
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
Getting modifications from master.
Commit: 035e4c5b31f46e1703832aadacecfc995d2bcd71
https://github.com/dyninst/dyninst/commit/035e4c5b31f46e1703832aadacecfc995d2bcd71
Author: mneumann <mneumann@xxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
Enable parsing of members without location information (implicitely 0) in unions
Commit: f93707f13116b2f2b9c62d44b44df0415b4cccf9
https://github.com/dyninst/dyninst/commit/f93707f13116b2f2b9c62d44b44df0415b4cccf9
Author: mneumann <mneumann@xxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
Use an explicit name for anonymous unions, structs and classes
Commit: 095e526d00f4f8cc93a2d9f6109c3b1d324a8e6e
https://github.com/dyninst/dyninst/commit/095e526d00f4f8cc93a2d9f6109c3b1d324a8e6e
Author: Bill Williams <bill@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Replaced a bunch of asserts with graceful error handling.
Commit: 3a7d20c3f2d390c77674325b0434d446bde623c8
https://github.com/dyninst/dyninst/commit/3a7d20c3f2d390c77674325b0434d446bde623c8
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dwarf/h/dwarfHandle.h
M dwarf/src/dwarfHandle.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
Log Message:
-----------
Fixing some bugs. Including, among others, module language determination and parsing global symbol modules.
Fixing parseLineInfoForCU function. Still miss a snippet.
Fixing some logical comparisons due to diferent meaning of return status
between the libraries libdw and libdwarf.
Commit: 1aec77b59872093a9f733dfeba28d1e3e8e16341
https://github.com/dyninst/dyninst/commit/1aec77b59872093a9f733dfeba28d1e3e8e16341
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
Log Message:
-----------
Editing some verification of return values and changing some dwarf
decoding code.
Editing decodeLocationList and fixing some return values verification.
Commit: 00ffcb9ed88b396b04a67bddb698158e25621e29
https://github.com/dyninst/dyninst/commit/00ffcb9ed88b396b04a67bddb698158e25621e29
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M cmake/packages.cmake
M dwarf/h/dwarfFrameParser.h
M dwarf/src/dwarfFrameParser.C
M dwarf/src/dwarfHandle.C
M dwarf/src/dwarfResult.C
M dyninstAPI/src/BPatch_function.C
M stackwalk/src/dbginfo-stepper.C
M symtabAPI/src/Function.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
M symtabAPI/src/parseDwarf.C
Log Message:
-----------
Cleaning up some code. Fixing DwarfWalker::decodeExpression, and minor issues.
Commit: 7a63daee36d8bc550286801feb1c6c08b546031e
https://github.com/dyninst/dyninst/commit/7a63daee36d8bc550286801feb1c6c08b546031e
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dwarf/CMakeLists.txt
M dwarf/h/dwarfFrameParser.h
M dwarf/src/dwarfFrameParser.C
Log Message:
-----------
Fixing DwarfFrameParser to seek FDE and not Dwarf_Frame.
Commit: b4f0d96123615726e6fd036dae5bc787c5dc5346
https://github.com/dyninst/dyninst/commit/b4f0d96123615726e6fd036dae5bc787c5dc5346
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dwarf/h/dwarfFrameParser.h
M dwarf/src/dwarfFrameParser.C
M symtabAPI/src/Function.C
M symtabAPI/src/Variable.C
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
About to make many changes in dwarfFrameParser
Passing test of local_var_locations.
Fixing decode location list.
Commit: 390e3239eac42b3a9f0668a384d5f0934072161c
https://github.com/dyninst/dyninst/commit/390e3239eac42b3a9f0668a384d5f0934072161c
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M dyninstAPI/src/dynProcess.C
M dyninstAPI/src/pcEventHandler.C
M dyninstAPI/src/pcEventMuxer.C
Log Message:
-----------
Fixing the destruction of objects under process control api.
Commit: 8bc31bc29ca35a6c888b35aa449cb7e58d83c87d
https://github.com/dyninst/dyninst/commit/8bc31bc29ca35a6c888b35aa449cb7e58d83c87d
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
test_line_info now passing.
Commit: 42752bf00a61c958fe8d42cd97493a40d35beac1
https://github.com/dyninst/dyninst/commit/42752bf00a61c958fe8d42cd97493a40d35beac1
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
Log Message:
-----------
Editing functions that are used to get exception blocks.
Getting the augmentation data of a FDE.
Commit: 50c43e19595a14be924949aaa700f5bf9640c47f
https://github.com/dyninst/dyninst/commit/50c43e19595a14be924949aaa700f5bf9640c47f
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-18 (Fri, 18 Aug 2017)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/emitElf.C
Log Message:
-----------
Implemented decoding of low pc address for FDE.
Fixing a bug already fixed in another branch.
Commit: 92f74cda43cf80623af88318fc5671c2e40b4b3a
https://github.com/dyninst/dyninst/commit/92f74cda43cf80623af88318fc5671c2e40b4b3a
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-x86.C
Log Message:
-----------
For x86/64 instruction decoding, when MODRM.mod is 01 or 10 and using sib, we still need to decode the displacement
Commit: c6f79fe9d08edbda36d4e77cda3933428477ab55
https://github.com/dyninst/dyninst/commit/c6f79fe9d08edbda36d4e77cda3933428477ab55
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTableIndexPred.C
M parseAPI/src/SymbolicExpression.C
Log Message:
-----------
Fix simpliyfing AST with concat operations in jump table analysis
Commit: 7c8ae41e7289bc9d94ce0df1fd1a938093e2268c
https://github.com/dyninst/dyninst/commit/7c8ae41e7289bc9d94ce0df1fd1a938093e2268c
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTableFormatPred.C
M parseAPI/src/SymbolicExpression.C
M parseAPI/src/SymbolicExpression.h
Log Message:
-----------
When symplifying AST in jump table analysis, we need to remove multiplying by one and shifting left by zero from the AST when doing jump table indexing slice, to improve aliasing tracking;
on the other hand, we should keep these multilcation by one or shifting left by zero when doing jump table format slice, to identify the index variable for one byte long tables
Commit: 169d73c4556b3b095a08cccd6ded62eab780bc7e
https://github.com/dyninst/dyninst/commit/169d73c4556b3b095a08cccd6ded62eab780bc7e
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
Log Message:
-----------
Semantics for load/store pair instructions
Variants of following instructions now supported:
* LDP
* STP
* LDPSW
* LDNP
* STNP
Commit: 877675c34035cb02b3eccf4b2f9f0220ff30874c
https://github.com/dyninst/dyninst/commit/877675c34035cb02b3eccf4b2f9f0220ff30874c
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
Log Message:
-----------
Semantics for load/store (unprivileged instructions)
Includes semantics for the following instructions:
* LDTR
* LDTRB
* LDTRH
* LDTRSB
* LDTRSH
* STTR
* STTRB
* STTRH
Commit: 3d71222b72bba8ca697f7ef8b406fcc968813b0c
https://github.com/dyninst/dyninst/commit/3d71222b72bba8ca697f7ef8b406fcc968813b0c
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
Log Message:
-----------
Semantics for load/store-unscaled instructions
Includes semantics for the following instructions:
* LDUR
* LDURB
* LDURH
* LDURSB
* LDURSH
* LDURSW
* STUR
* STURB
* STURH
Commit: 938370ac620af5bb40d7f8f512ddffc659679053
https://github.com/dyninst/dyninst/commit/938370ac620af5bb40d7f8f512ddffc659679053
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
Log Message:
-----------
Semantics for shift instruction.
Includes semantics for the following instructions:
* LSL (register)
* LSLV
* LSR (register)
* LSRV
* ASR (register)
* ASRV
* ROR (register)
* RORV
Introduced method DispatcherARM64::ShiftReg that is utilized by the
semantics of all the above instructions and calls the appropriate shift
function under BaseSemantics::RiscOperators based on the shift type.
Introduced method DispatcherARM64::getShiftType that is again used by
the semantics code to determine the type of shift.
Commit: d67f58eb62cbf6360484c72d9ebbd9e5e6e9ef61
https://github.com/dyninst/dyninst/commit/d67f58eb62cbf6360484c72d9ebbd9e5e6e9ef61
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
Log Message:
-----------
Semantics for more arithmetic instructions
Includes semantics for the following instructions:
* TST (immediate)
* TST (shifted)
* SBC
* SBCS
* NGC
* NGCS
* NEG
* NEGS
* MVN
* MOV (to/from SP)
Commit: 0f15ee8bd1d5d045d241f17216c0c0346c470152
https://github.com/dyninst/dyninst/commit/0f15ee8bd1d5d045d241f17216c0c0346c470152
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
Log Message:
-----------
Semantics for CSEL
Also added a method to return the condition code value from the raw
isntruction based on the instruction category.
Commit: 5c56805ec81f9226523c908e1b6728a691b1122d
https://github.com/dyninst/dyninst/commit/5c56805ec81f9226523c908e1b6728a691b1122d
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
Log Message:
-----------
Semantics for CLS and CLZ
Introduced new enum CountOp that indicates type of count operation for
these instructions, as well as the utility functions -
CountLeadingZeroBits and CountLeadingSignBits - that implement the
counting logic.
Commit: b4de4349e3d2141ee7128d14eb4312cca51c1464
https://github.com/dyninst/dyninst/commit/b4de4349e3d2141ee7128d14eb4312cca51c1464
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
Log Message:
-----------
Semantics for data processing (3-source) instructions and their aliases (non-SIMD)
Includes semantics for the following instructions:
MADD, MSUB, MNEG, MUL, SMADDL, SMSUBL, SMNEGL, SMULH, SMULL, UMADDL,
UMSEBL, UMNEGL, UMULH, UMULL
Commit: a318b19bb6599ca2514a412d3301c8ceecd56b23
https://github.com/dyninst/dyninst/commit/a318b19bb6599ca2514a412d3301c8ceecd56b23
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
Log Message:
-----------
Semantics for load/store acquire/release instructions (non-SIMD)
Includes semantics for the following instructions:
* LDAR
* LDARH
* LDARB
* STLR
* STLRB
* STLRH
Commit: e512ccb5adc36316e663429571547cbea604441c
https://github.com/dyninst/dyninst/commit/e512ccb5adc36316e663429571547cbea604441c
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
Log Message:
-----------
Semantics for UDIV and SDIV
Commit: 564b7d080199b8fa4351d32680f1162458b63f3f
https://github.com/dyninst/dyninst/commit/564b7d080199b8fa4351d32680f1162458b63f3f
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
Log Message:
-----------
Added comments for the declaration of several methods in the DispatcherARM64 class and
relevant comments in their implementation.
Commit: e13086adbc45fe8d973eefd2a2d2b7c4a303781f
https://github.com/dyninst/dyninst/commit/e13086adbc45fe8d973eefd2a2d2b7c4a303781f
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
A instructionAPI/ISA_ps/abs_advsimd
A instructionAPI/ISA_ps/adc
A instructionAPI/ISA_ps/adcs
A instructionAPI/ISA_ps/add_addsub_ext
A instructionAPI/ISA_ps/add_addsub_imm
A instructionAPI/ISA_ps/add_addsub_shift
A instructionAPI/ISA_ps/add_advsimd
A instructionAPI/ISA_ps/addhn_advsimd
A instructionAPI/ISA_ps/addp_advsimd_pair
A instructionAPI/ISA_ps/addp_advsimd_vec
A instructionAPI/ISA_ps/adds_addsub_ext
A instructionAPI/ISA_ps/adds_addsub_imm
A instructionAPI/ISA_ps/adds_addsub_shift
A instructionAPI/ISA_ps/addv_advsimd
A instructionAPI/ISA_ps/adr
A instructionAPI/ISA_ps/adrp
A instructionAPI/ISA_ps/aesd_advsimd
A instructionAPI/ISA_ps/aese_advsimd
A instructionAPI/ISA_ps/aesimc_advsimd
A instructionAPI/ISA_ps/aesmc_advsimd
A instructionAPI/ISA_ps/and_advsimd
A instructionAPI/ISA_ps/and_log_imm
A instructionAPI/ISA_ps/and_log_shift
A instructionAPI/ISA_ps/ands_log_imm
A instructionAPI/ISA_ps/ands_log_shift
A instructionAPI/ISA_ps/asr_asrv
A instructionAPI/ISA_ps/asr_sbfm
A instructionAPI/ISA_ps/asrv
A instructionAPI/ISA_ps/at_sys
A instructionAPI/ISA_ps/b_cond
A instructionAPI/ISA_ps/b_uncond
A instructionAPI/ISA_ps/bfi_bfm
A instructionAPI/ISA_ps/bfm
A instructionAPI/ISA_ps/bfxil_bfm
A instructionAPI/ISA_ps/bic_advsimd_imm
A instructionAPI/ISA_ps/bic_advsimd_reg
A instructionAPI/ISA_ps/bic_log_shift
A instructionAPI/ISA_ps/bics
A instructionAPI/ISA_ps/bif_advsimd
A instructionAPI/ISA_ps/bit_advsimd
A instructionAPI/ISA_ps/bl
A instructionAPI/ISA_ps/blr
A instructionAPI/ISA_ps/br
A instructionAPI/ISA_ps/brk
A instructionAPI/ISA_ps/bsl_advsimd
A instructionAPI/ISA_ps/cbnz
A instructionAPI/ISA_ps/cbz
A instructionAPI/ISA_ps/ccmn_imm
A instructionAPI/ISA_ps/ccmn_reg
A instructionAPI/ISA_ps/ccmp_imm
A instructionAPI/ISA_ps/ccmp_reg
A instructionAPI/ISA_ps/cinc_csinc
A instructionAPI/ISA_ps/cinv_csinv
A instructionAPI/ISA_ps/clrex
A instructionAPI/ISA_ps/cls_advsimd
A instructionAPI/ISA_ps/cls_int
A instructionAPI/ISA_ps/clz_advsimd
A instructionAPI/ISA_ps/clz_int
A instructionAPI/ISA_ps/cmeq_advsimd_reg
A instructionAPI/ISA_ps/cmeq_advsimd_zero
A instructionAPI/ISA_ps/cmge_advsimd_reg
A instructionAPI/ISA_ps/cmge_advsimd_zero
A instructionAPI/ISA_ps/cmgt_advsimd_reg
A instructionAPI/ISA_ps/cmgt_advsimd_zero
A instructionAPI/ISA_ps/cmhi_advsimd
A instructionAPI/ISA_ps/cmhs_advsimd
A instructionAPI/ISA_ps/cmle_advsimd
A instructionAPI/ISA_ps/cmlt_advsimd
A instructionAPI/ISA_ps/cmn_adds_addsub_ext
A instructionAPI/ISA_ps/cmn_adds_addsub_imm
A instructionAPI/ISA_ps/cmn_adds_addsub_shift
A instructionAPI/ISA_ps/cmp_subs_addsub_ext
A instructionAPI/ISA_ps/cmp_subs_addsub_imm
A instructionAPI/ISA_ps/cmp_subs_addsub_shift
A instructionAPI/ISA_ps/cmtst_advsimd
A instructionAPI/ISA_ps/cneg_csneg
A instructionAPI/ISA_ps/cnt_advsimd
A instructionAPI/ISA_ps/crc32
A instructionAPI/ISA_ps/crc32c
A instructionAPI/ISA_ps/csel
A instructionAPI/ISA_ps/cset_csinc
A instructionAPI/ISA_ps/csetm_csinv
A instructionAPI/ISA_ps/csinc
A instructionAPI/ISA_ps/csinv
A instructionAPI/ISA_ps/csneg
A instructionAPI/ISA_ps/dc_sys
A instructionAPI/ISA_ps/dcps1
A instructionAPI/ISA_ps/dcps2
A instructionAPI/ISA_ps/dcps3
A instructionAPI/ISA_ps/dmb
A instructionAPI/ISA_ps/drps
A instructionAPI/ISA_ps/dsb
A instructionAPI/ISA_ps/dup_advsimd_elt
A instructionAPI/ISA_ps/dup_advsimd_gen
A instructionAPI/ISA_ps/encodingindex
A instructionAPI/ISA_ps/enumerated-symbol-accounts
A instructionAPI/ISA_ps/eon
A instructionAPI/ISA_ps/eor_advsimd
A instructionAPI/ISA_ps/eor_log_imm
A instructionAPI/ISA_ps/eor_log_shift
A instructionAPI/ISA_ps/eret
A instructionAPI/ISA_ps/ext_advsimd
A instructionAPI/ISA_ps/extr
A instructionAPI/ISA_ps/fabd_advsimd
A instructionAPI/ISA_ps/fabs_advsimd
A instructionAPI/ISA_ps/fabs_float
A instructionAPI/ISA_ps/facge_advsimd
A instructionAPI/ISA_ps/facgt_advsimd
A instructionAPI/ISA_ps/fadd_advsimd
A instructionAPI/ISA_ps/fadd_float
A instructionAPI/ISA_ps/faddp_advsimd_pair
A instructionAPI/ISA_ps/faddp_advsimd_vec
A instructionAPI/ISA_ps/fccmp_float
A instructionAPI/ISA_ps/fccmpe_float
A instructionAPI/ISA_ps/fcmeq_advsimd_reg
A instructionAPI/ISA_ps/fcmeq_advsimd_zero
A instructionAPI/ISA_ps/fcmge_advsimd_reg
A instructionAPI/ISA_ps/fcmge_advsimd_zero
A instructionAPI/ISA_ps/fcmgt_advsimd_reg
A instructionAPI/ISA_ps/fcmgt_advsimd_zero
A instructionAPI/ISA_ps/fcmle_advsimd
A instructionAPI/ISA_ps/fcmlt_advsimd
A instructionAPI/ISA_ps/fcmp_float
A instructionAPI/ISA_ps/fcmpe_float
A instructionAPI/ISA_ps/fcsel_float
A instructionAPI/ISA_ps/fcvt_float
A instructionAPI/ISA_ps/fcvtas_advsimd
A instructionAPI/ISA_ps/fcvtas_float
A instructionAPI/ISA_ps/fcvtau_advsimd
A instructionAPI/ISA_ps/fcvtau_float
A instructionAPI/ISA_ps/fcvtl_advsimd
A instructionAPI/ISA_ps/fcvtms_advsimd
A instructionAPI/ISA_ps/fcvtms_float
A instructionAPI/ISA_ps/fcvtmu_advsimd
A instructionAPI/ISA_ps/fcvtmu_float
A instructionAPI/ISA_ps/fcvtn_advsimd
A instructionAPI/ISA_ps/fcvtns_advsimd
A instructionAPI/ISA_ps/fcvtns_float
A instructionAPI/ISA_ps/fcvtnu_advsimd
A instructionAPI/ISA_ps/fcvtnu_float
A instructionAPI/ISA_ps/fcvtps_advsimd
A instructionAPI/ISA_ps/fcvtps_float
A instructionAPI/ISA_ps/fcvtpu_advsimd
A instructionAPI/ISA_ps/fcvtpu_float
A instructionAPI/ISA_ps/fcvtxn_advsimd
A instructionAPI/ISA_ps/fcvtzs_advsimd_fix
A instructionAPI/ISA_ps/fcvtzs_advsimd_int
A instructionAPI/ISA_ps/fcvtzs_float_fix
A instructionAPI/ISA_ps/fcvtzs_float_int
A instructionAPI/ISA_ps/fcvtzu_advsimd_fix
A instructionAPI/ISA_ps/fcvtzu_advsimd_int
A instructionAPI/ISA_ps/fcvtzu_float_fix
A instructionAPI/ISA_ps/fcvtzu_float_int
A instructionAPI/ISA_ps/fdiv_advsimd
A instructionAPI/ISA_ps/fdiv_float
A instructionAPI/ISA_ps/fmadd_float
A instructionAPI/ISA_ps/fmax_advsimd
A instructionAPI/ISA_ps/fmax_float
A instructionAPI/ISA_ps/fmaxnm_advsimd
A instructionAPI/ISA_ps/fmaxnm_float
A instructionAPI/ISA_ps/fmaxnmp_advsimd_pair
A instructionAPI/ISA_ps/fmaxnmp_advsimd_vec
A instructionAPI/ISA_ps/fmaxnmv_advsimd
A instructionAPI/ISA_ps/fmaxp_advsimd_pair
A instructionAPI/ISA_ps/fmaxp_advsimd_vec
A instructionAPI/ISA_ps/fmaxv_advsimd
A instructionAPI/ISA_ps/fmin_advsimd
A instructionAPI/ISA_ps/fmin_float
A instructionAPI/ISA_ps/fminnm_advsimd
A instructionAPI/ISA_ps/fminnm_float
A instructionAPI/ISA_ps/fminnmp_advsimd_pair
A instructionAPI/ISA_ps/fminnmp_advsimd_vec
A instructionAPI/ISA_ps/fminnmv_advsimd
A instructionAPI/ISA_ps/fminp_advsimd_pair
A instructionAPI/ISA_ps/fminp_advsimd_vec
A instructionAPI/ISA_ps/fminv_advsimd
A instructionAPI/ISA_ps/fmla_advsimd_elt
A instructionAPI/ISA_ps/fmla_advsimd_vec
A instructionAPI/ISA_ps/fmls_advsimd_elt
A instructionAPI/ISA_ps/fmls_advsimd_vec
A instructionAPI/ISA_ps/fmov_advsimd
A instructionAPI/ISA_ps/fmov_float
A instructionAPI/ISA_ps/fmov_float_gen
A instructionAPI/ISA_ps/fmov_float_imm
A instructionAPI/ISA_ps/fmsub_float
A instructionAPI/ISA_ps/fmul_advsimd_elt
A instructionAPI/ISA_ps/fmul_advsimd_vec
A instructionAPI/ISA_ps/fmul_float
A instructionAPI/ISA_ps/fmulx_advsimd_elt
A instructionAPI/ISA_ps/fmulx_advsimd_vec
A instructionAPI/ISA_ps/fneg_advsimd
A instructionAPI/ISA_ps/fneg_float
A instructionAPI/ISA_ps/fnmadd_float
A instructionAPI/ISA_ps/fnmsub_float
A instructionAPI/ISA_ps/fnmul_float
A instructionAPI/ISA_ps/fpsimdindex
A instructionAPI/ISA_ps/frecpe_advsimd
A instructionAPI/ISA_ps/frecps_advsimd
A instructionAPI/ISA_ps/frecpx_advsimd
A instructionAPI/ISA_ps/frinta_advsimd
A instructionAPI/ISA_ps/frinta_float
A instructionAPI/ISA_ps/frinti_advsimd
A instructionAPI/ISA_ps/frinti_float
A instructionAPI/ISA_ps/frintm_advsimd
A instructionAPI/ISA_ps/frintm_float
A instructionAPI/ISA_ps/frintn_advsimd
A instructionAPI/ISA_ps/frintn_float
A instructionAPI/ISA_ps/frintp_advsimd
A instructionAPI/ISA_ps/frintp_float
A instructionAPI/ISA_ps/frintx_advsimd
A instructionAPI/ISA_ps/frintx_float
A instructionAPI/ISA_ps/frintz_advsimd
A instructionAPI/ISA_ps/frintz_float
A instructionAPI/ISA_ps/frsqrte_advsimd
A instructionAPI/ISA_ps/frsqrts_advsimd
A instructionAPI/ISA_ps/fsqrt_advsimd
A instructionAPI/ISA_ps/fsqrt_float
A instructionAPI/ISA_ps/fsub_advsimd
A instructionAPI/ISA_ps/fsub_float
A instructionAPI/ISA_ps/hint
A instructionAPI/ISA_ps/hlt
A instructionAPI/ISA_ps/hvc
A instructionAPI/ISA_ps/ic_sys
A instructionAPI/ISA_ps/index
A instructionAPI/ISA_ps/ins_advsimd_elt
A instructionAPI/ISA_ps/ins_advsimd_gen
A instructionAPI/ISA_ps/isb
A instructionAPI/ISA_ps/ld1_advsimd_mult
A instructionAPI/ISA_ps/ld1_advsimd_sngl
A instructionAPI/ISA_ps/ld1r_advsimd
A instructionAPI/ISA_ps/ld2_advsimd_mult
A instructionAPI/ISA_ps/ld2_advsimd_sngl
A instructionAPI/ISA_ps/ld2r_advsimd
A instructionAPI/ISA_ps/ld3_advsimd_mult
A instructionAPI/ISA_ps/ld3_advsimd_sngl
A instructionAPI/ISA_ps/ld3r_advsimd
A instructionAPI/ISA_ps/ld4_advsimd_mult
A instructionAPI/ISA_ps/ld4_advsimd_sngl
A instructionAPI/ISA_ps/ld4r_advsimd
A instructionAPI/ISA_ps/ldar
A instructionAPI/ISA_ps/ldarb
A instructionAPI/ISA_ps/ldarh
A instructionAPI/ISA_ps/ldaxp
A instructionAPI/ISA_ps/ldaxr
A instructionAPI/ISA_ps/ldaxrb
A instructionAPI/ISA_ps/ldaxrh
A instructionAPI/ISA_ps/ldnp_fpsimd
A instructionAPI/ISA_ps/ldnp_gen
A instructionAPI/ISA_ps/ldp_fpsimd
A instructionAPI/ISA_ps/ldp_gen
A instructionAPI/ISA_ps/ldpsw
A instructionAPI/ISA_ps/ldr_imm_fpsimd
A instructionAPI/ISA_ps/ldr_imm_gen
A instructionAPI/ISA_ps/ldr_lit_fpsimd
A instructionAPI/ISA_ps/ldr_lit_gen
A instructionAPI/ISA_ps/ldr_reg_fpsimd
A instructionAPI/ISA_ps/ldr_reg_gen
A instructionAPI/ISA_ps/ldrb_imm
A instructionAPI/ISA_ps/ldrb_reg
A instructionAPI/ISA_ps/ldrh_imm
A instructionAPI/ISA_ps/ldrh_reg
A instructionAPI/ISA_ps/ldrsb_imm
A instructionAPI/ISA_ps/ldrsb_reg
A instructionAPI/ISA_ps/ldrsh_imm
A instructionAPI/ISA_ps/ldrsh_reg
A instructionAPI/ISA_ps/ldrsw_imm
A instructionAPI/ISA_ps/ldrsw_lit
A instructionAPI/ISA_ps/ldrsw_reg
A instructionAPI/ISA_ps/ldtr
A instructionAPI/ISA_ps/ldtrb
A instructionAPI/ISA_ps/ldtrh
A instructionAPI/ISA_ps/ldtrsb
A instructionAPI/ISA_ps/ldtrsh
A instructionAPI/ISA_ps/ldtrsw
A instructionAPI/ISA_ps/ldur_fpsimd
A instructionAPI/ISA_ps/ldur_gen
A instructionAPI/ISA_ps/ldurb
A instructionAPI/ISA_ps/ldurh
A instructionAPI/ISA_ps/ldursb
A instructionAPI/ISA_ps/ldursh
A instructionAPI/ISA_ps/ldursw
A instructionAPI/ISA_ps/ldxp
A instructionAPI/ISA_ps/ldxr
A instructionAPI/ISA_ps/ldxrb
A instructionAPI/ISA_ps/ldxrh
A instructionAPI/ISA_ps/lsl_lslv
A instructionAPI/ISA_ps/lsl_ubfm
A instructionAPI/ISA_ps/lslv
A instructionAPI/ISA_ps/lsr_lsrv
A instructionAPI/ISA_ps/lsr_ubfm
A instructionAPI/ISA_ps/lsrv
A instructionAPI/ISA_ps/madd
A instructionAPI/ISA_ps/mla_advsimd_elt
A instructionAPI/ISA_ps/mla_advsimd_vec
A instructionAPI/ISA_ps/mls_advsimd_elt
A instructionAPI/ISA_ps/mls_advsimd_vec
A instructionAPI/ISA_ps/mneg_msub
A instructionAPI/ISA_ps/mov_add_addsub_imm
A instructionAPI/ISA_ps/mov_dup_advsimd_elt
A instructionAPI/ISA_ps/mov_ins_advsimd_elt
A instructionAPI/ISA_ps/mov_ins_advsimd_gen
A instructionAPI/ISA_ps/mov_movn
A instructionAPI/ISA_ps/mov_movz
A instructionAPI/ISA_ps/mov_orr_advsimd_reg
A instructionAPI/ISA_ps/mov_orr_log_imm
A instructionAPI/ISA_ps/mov_orr_log_shift
A instructionAPI/ISA_ps/mov_umov_advsimd
A instructionAPI/ISA_ps/movi_advsimd
A instructionAPI/ISA_ps/movk
A instructionAPI/ISA_ps/movn
A instructionAPI/ISA_ps/movz
A instructionAPI/ISA_ps/mrs
A instructionAPI/ISA_ps/msr_imm
A instructionAPI/ISA_ps/msr_reg
A instructionAPI/ISA_ps/msub
A instructionAPI/ISA_ps/mul_advsimd_elt
A instructionAPI/ISA_ps/mul_advsimd_vec
A instructionAPI/ISA_ps/mul_madd
A instructionAPI/ISA_ps/mvn_not_advsimd
A instructionAPI/ISA_ps/mvn_orn_log_shift
A instructionAPI/ISA_ps/mvni_advsimd
A instructionAPI/ISA_ps/neg_advsimd
A instructionAPI/ISA_ps/neg_sub_addsub_shift
A instructionAPI/ISA_ps/negs_subs_addsub_shift
A instructionAPI/ISA_ps/ngc_sbc
A instructionAPI/ISA_ps/ngcs_sbcs
A instructionAPI/ISA_ps/nop_hint
A instructionAPI/ISA_ps/not_advsimd
A instructionAPI/ISA_ps/orn_advsimd
A instructionAPI/ISA_ps/orn_log_shift
A instructionAPI/ISA_ps/orr_advsimd_imm
A instructionAPI/ISA_ps/orr_advsimd_reg
A instructionAPI/ISA_ps/orr_log_imm
A instructionAPI/ISA_ps/orr_log_shift
A instructionAPI/ISA_ps/permindex
A instructionAPI/ISA_ps/pmul_advsimd
A instructionAPI/ISA_ps/pmull_advsimd
A instructionAPI/ISA_ps/prfm_imm
A instructionAPI/ISA_ps/prfm_lit
A instructionAPI/ISA_ps/prfm_reg
A instructionAPI/ISA_ps/prfum
A instructionAPI/ISA_ps/raddhn_advsimd
A instructionAPI/ISA_ps/rbit_advsimd
A instructionAPI/ISA_ps/rbit_int
A instructionAPI/ISA_ps/ret
A instructionAPI/ISA_ps/rev
A instructionAPI/ISA_ps/rev16_advsimd
A instructionAPI/ISA_ps/rev16_int
A instructionAPI/ISA_ps/rev32_advsimd
A instructionAPI/ISA_ps/rev32_int
A instructionAPI/ISA_ps/rev64_advsimd
A instructionAPI/ISA_ps/ror_extr
A instructionAPI/ISA_ps/ror_rorv
A instructionAPI/ISA_ps/rorv
A instructionAPI/ISA_ps/rshrn_advsimd
A instructionAPI/ISA_ps/rsubhn_advsimd
A instructionAPI/ISA_ps/saba_advsimd
A instructionAPI/ISA_ps/sabal_advsimd
A instructionAPI/ISA_ps/sabd_advsimd
A instructionAPI/ISA_ps/sabdl_advsimd
A instructionAPI/ISA_ps/sadalp_advsimd
A instructionAPI/ISA_ps/saddl_advsimd
A instructionAPI/ISA_ps/saddlp_advsimd
A instructionAPI/ISA_ps/saddlv_advsimd
A instructionAPI/ISA_ps/saddw_advsimd
A instructionAPI/ISA_ps/sbc
A instructionAPI/ISA_ps/sbcs
A instructionAPI/ISA_ps/sbfiz_sbfm
A instructionAPI/ISA_ps/sbfm
A instructionAPI/ISA_ps/sbfx_sbfm
A instructionAPI/ISA_ps/scvtf_advsimd_fix
A instructionAPI/ISA_ps/scvtf_advsimd_int
A instructionAPI/ISA_ps/scvtf_float_fix
A instructionAPI/ISA_ps/scvtf_float_int
A instructionAPI/ISA_ps/sdiv
A instructionAPI/ISA_ps/sev_hint
A instructionAPI/ISA_ps/sevl_hint
A instructionAPI/ISA_ps/sha1c_advsimd
A instructionAPI/ISA_ps/sha1h_advsimd
A instructionAPI/ISA_ps/sha1m_advsimd
A instructionAPI/ISA_ps/sha1p_advsimd
A instructionAPI/ISA_ps/sha1su0_advsimd
A instructionAPI/ISA_ps/sha1su1_advsimd
A instructionAPI/ISA_ps/sha256h2_advsimd
A instructionAPI/ISA_ps/sha256h_advsimd
A instructionAPI/ISA_ps/sha256su0_advsimd
A instructionAPI/ISA_ps/sha256su1_advsimd
A instructionAPI/ISA_ps/shadd_advsimd
A instructionAPI/ISA_ps/shared_pseudocode
A instructionAPI/ISA_ps/shl_advsimd
A instructionAPI/ISA_ps/shll_advsimd
A instructionAPI/ISA_ps/shrn_advsimd
A instructionAPI/ISA_ps/shsub_advsimd
A instructionAPI/ISA_ps/sli_advsimd
A instructionAPI/ISA_ps/smaddl
A instructionAPI/ISA_ps/smax_advsimd
A instructionAPI/ISA_ps/smaxp_advsimd
A instructionAPI/ISA_ps/smaxv_advsimd
A instructionAPI/ISA_ps/smc
A instructionAPI/ISA_ps/smin_advsimd
A instructionAPI/ISA_ps/sminp_advsimd
A instructionAPI/ISA_ps/sminv_advsimd
A instructionAPI/ISA_ps/smlal_advsimd_elt
A instructionAPI/ISA_ps/smlal_advsimd_vec
A instructionAPI/ISA_ps/smlsl_advsimd_elt
A instructionAPI/ISA_ps/smlsl_advsimd_vec
A instructionAPI/ISA_ps/smnegl_smsubl
A instructionAPI/ISA_ps/smov_advsimd
A instructionAPI/ISA_ps/smsubl
A instructionAPI/ISA_ps/smulh
A instructionAPI/ISA_ps/smull_advsimd_elt
A instructionAPI/ISA_ps/smull_advsimd_vec
A instructionAPI/ISA_ps/smull_smaddl
A instructionAPI/ISA_ps/sqabs_advsimd
A instructionAPI/ISA_ps/sqadd_advsimd
A instructionAPI/ISA_ps/sqdmlal_advsimd_elt
A instructionAPI/ISA_ps/sqdmlal_advsimd_vec
A instructionAPI/ISA_ps/sqdmlsl_advsimd_elt
A instructionAPI/ISA_ps/sqdmlsl_advsimd_vec
A instructionAPI/ISA_ps/sqdmulh_advsimd_elt
A instructionAPI/ISA_ps/sqdmulh_advsimd_vec
A instructionAPI/ISA_ps/sqdmull_advsimd_elt
A instructionAPI/ISA_ps/sqdmull_advsimd_vec
A instructionAPI/ISA_ps/sqneg_advsimd
A instructionAPI/ISA_ps/sqrdmulh_advsimd_elt
A instructionAPI/ISA_ps/sqrdmulh_advsimd_vec
A instructionAPI/ISA_ps/sqrshl_advsimd
A instructionAPI/ISA_ps/sqrshrn_advsimd
A instructionAPI/ISA_ps/sqrshrun_advsimd
A instructionAPI/ISA_ps/sqshl_advsimd_imm
A instructionAPI/ISA_ps/sqshl_advsimd_reg
A instructionAPI/ISA_ps/sqshlu_advsimd
A instructionAPI/ISA_ps/sqshrn_advsimd
A instructionAPI/ISA_ps/sqshrun_advsimd
A instructionAPI/ISA_ps/sqsub_advsimd
A instructionAPI/ISA_ps/sqxtn_advsimd
A instructionAPI/ISA_ps/sqxtun_advsimd
A instructionAPI/ISA_ps/srhadd_advsimd
A instructionAPI/ISA_ps/sri_advsimd
A instructionAPI/ISA_ps/srshl_advsimd
A instructionAPI/ISA_ps/srshr_advsimd
A instructionAPI/ISA_ps/srsra_advsimd
A instructionAPI/ISA_ps/sshl_advsimd
A instructionAPI/ISA_ps/sshll_advsimd
A instructionAPI/ISA_ps/sshr_advsimd
A instructionAPI/ISA_ps/ssra_advsimd
A instructionAPI/ISA_ps/ssubl_advsimd
A instructionAPI/ISA_ps/ssubw_advsimd
A instructionAPI/ISA_ps/st1_advsimd_mult
A instructionAPI/ISA_ps/st1_advsimd_sngl
A instructionAPI/ISA_ps/st2_advsimd_mult
A instructionAPI/ISA_ps/st2_advsimd_sngl
A instructionAPI/ISA_ps/st3_advsimd_mult
A instructionAPI/ISA_ps/st3_advsimd_sngl
A instructionAPI/ISA_ps/st4_advsimd_mult
A instructionAPI/ISA_ps/st4_advsimd_sngl
A instructionAPI/ISA_ps/stlr
A instructionAPI/ISA_ps/stlrb
A instructionAPI/ISA_ps/stlrh
A instructionAPI/ISA_ps/stlxp
A instructionAPI/ISA_ps/stlxr
A instructionAPI/ISA_ps/stlxrb
A instructionAPI/ISA_ps/stlxrh
A instructionAPI/ISA_ps/stnp_fpsimd
A instructionAPI/ISA_ps/stnp_gen
A instructionAPI/ISA_ps/stp_fpsimd
A instructionAPI/ISA_ps/stp_gen
A instructionAPI/ISA_ps/str_imm_fpsimd
A instructionAPI/ISA_ps/str_imm_gen
A instructionAPI/ISA_ps/str_reg_fpsimd
A instructionAPI/ISA_ps/str_reg_gen
A instructionAPI/ISA_ps/strb_imm
A instructionAPI/ISA_ps/strb_reg
A instructionAPI/ISA_ps/strh_imm
A instructionAPI/ISA_ps/strh_reg
A instructionAPI/ISA_ps/sttr
A instructionAPI/ISA_ps/sttrb
A instructionAPI/ISA_ps/sttrh
A instructionAPI/ISA_ps/stur_fpsimd
A instructionAPI/ISA_ps/stur_gen
A instructionAPI/ISA_ps/sturb
A instructionAPI/ISA_ps/sturh
A instructionAPI/ISA_ps/stxp
A instructionAPI/ISA_ps/stxr
A instructionAPI/ISA_ps/stxrb
A instructionAPI/ISA_ps/stxrh
A instructionAPI/ISA_ps/sub_addsub_ext
A instructionAPI/ISA_ps/sub_addsub_imm
A instructionAPI/ISA_ps/sub_addsub_shift
A instructionAPI/ISA_ps/sub_advsimd
A instructionAPI/ISA_ps/subhn_advsimd
A instructionAPI/ISA_ps/subs_addsub_ext
A instructionAPI/ISA_ps/subs_addsub_imm
A instructionAPI/ISA_ps/subs_addsub_shift
A instructionAPI/ISA_ps/suqadd_advsimd
A instructionAPI/ISA_ps/svc
A instructionAPI/ISA_ps/sxtb_sbfm
A instructionAPI/ISA_ps/sxth_sbfm
A instructionAPI/ISA_ps/sxtl_sshll_advsimd
A instructionAPI/ISA_ps/sxtw_sbfm
A instructionAPI/ISA_ps/sys
A instructionAPI/ISA_ps/sysl
A instructionAPI/ISA_ps/tbl_advsimd
A instructionAPI/ISA_ps/tbnz
A instructionAPI/ISA_ps/tbx_advsimd
A instructionAPI/ISA_ps/tbz
A instructionAPI/ISA_ps/temp.py
A instructionAPI/ISA_ps/tlbi_sys
A instructionAPI/ISA_ps/trn1_advsimd
A instructionAPI/ISA_ps/trn2_advsimd
A instructionAPI/ISA_ps/tst_ands_log_imm
A instructionAPI/ISA_ps/tst_ands_log_shift
A instructionAPI/ISA_ps/uaba_advsimd
A instructionAPI/ISA_ps/uabal_advsimd
A instructionAPI/ISA_ps/uabd_advsimd
A instructionAPI/ISA_ps/uabdl_advsimd
A instructionAPI/ISA_ps/uadalp_advsimd
A instructionAPI/ISA_ps/uaddl_advsimd
A instructionAPI/ISA_ps/uaddlp_advsimd
A instructionAPI/ISA_ps/uaddlv_advsimd
A instructionAPI/ISA_ps/uaddw_advsimd
A instructionAPI/ISA_ps/ubfiz_ubfm
A instructionAPI/ISA_ps/ubfm
A instructionAPI/ISA_ps/ubfx_ubfm
A instructionAPI/ISA_ps/ucvtf_advsimd_fix
A instructionAPI/ISA_ps/ucvtf_advsimd_int
A instructionAPI/ISA_ps/ucvtf_float_fix
A instructionAPI/ISA_ps/ucvtf_float_int
A instructionAPI/ISA_ps/udiv
A instructionAPI/ISA_ps/uhadd_advsimd
A instructionAPI/ISA_ps/uhsub_advsimd
A instructionAPI/ISA_ps/umaddl
A instructionAPI/ISA_ps/umax_advsimd
A instructionAPI/ISA_ps/umaxp_advsimd
A instructionAPI/ISA_ps/umaxv_advsimd
A instructionAPI/ISA_ps/umin_advsimd
A instructionAPI/ISA_ps/uminp_advsimd
A instructionAPI/ISA_ps/uminv_advsimd
A instructionAPI/ISA_ps/umlal_advsimd_elt
A instructionAPI/ISA_ps/umlal_advsimd_vec
A instructionAPI/ISA_ps/umlsl_advsimd_elt
A instructionAPI/ISA_ps/umlsl_advsimd_vec
A instructionAPI/ISA_ps/umnegl_umsubl
A instructionAPI/ISA_ps/umov_advsimd
A instructionAPI/ISA_ps/umsubl
A instructionAPI/ISA_ps/umulh
A instructionAPI/ISA_ps/umull_advsimd_elt
A instructionAPI/ISA_ps/umull_advsimd_vec
A instructionAPI/ISA_ps/umull_umaddl
A instructionAPI/ISA_ps/uqadd_advsimd
A instructionAPI/ISA_ps/uqrshl_advsimd
A instructionAPI/ISA_ps/uqrshrn_advsimd
A instructionAPI/ISA_ps/uqshl_advsimd_imm
A instructionAPI/ISA_ps/uqshl_advsimd_reg
A instructionAPI/ISA_ps/uqshrn_advsimd
A instructionAPI/ISA_ps/uqsub_advsimd
A instructionAPI/ISA_ps/uqxtn_advsimd
A instructionAPI/ISA_ps/urecpe_advsimd
A instructionAPI/ISA_ps/urhadd_advsimd
A instructionAPI/ISA_ps/urshl_advsimd
A instructionAPI/ISA_ps/urshr_advsimd
A instructionAPI/ISA_ps/ursqrte_advsimd
A instructionAPI/ISA_ps/ursra_advsimd
A instructionAPI/ISA_ps/ushl_advsimd
A instructionAPI/ISA_ps/ushll_advsimd
A instructionAPI/ISA_ps/ushr_advsimd
A instructionAPI/ISA_ps/usqadd_advsimd
A instructionAPI/ISA_ps/usra_advsimd
A instructionAPI/ISA_ps/usubl_advsimd
A instructionAPI/ISA_ps/usubw_advsimd
A instructionAPI/ISA_ps/uxtb_ubfm
A instructionAPI/ISA_ps/uxth_ubfm
A instructionAPI/ISA_ps/uxtl_ushll_advsimd
A instructionAPI/ISA_ps/uzp1_advsimd
A instructionAPI/ISA_ps/uzp2_advsimd
A instructionAPI/ISA_ps/wfe_hint
A instructionAPI/ISA_ps/wfi_hint
A instructionAPI/ISA_ps/xtn_advsimd
A instructionAPI/ISA_ps/yield_hint
A instructionAPI/ISA_ps/zip1_advsimd
A instructionAPI/ISA_ps/zip2_advsimd
A instructionAPI/aarch64_pseudocode_extractor.py
Log Message:
-----------
Added pseudocode extractor extract and instruction pseudocode files
ISA_ps contains one file for each instruction in the XML specification,
with each file containing the pseudocode for that instruction
extracted from the specification by the script.
Commit: 4b23c985d88fd0c30ec7b687a13b06345f787716
https://github.com/dyninst/dyninst/commit/4b23c985d88fd0c30ec7b687a13b06345f787716
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2017-08-21 (Mon, 21 Aug 2017)
Changed paths:
A common/docs/rose_structure.png
Log Message:
-----------
Added high-level of diagram of ROSE semantics
Commit: 0561bc941ba13179fbf473583f505062d15dc910
https://github.com/dyninst/dyninst/commit/0561bc941ba13179fbf473583f505062d15dc910
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-22 (Tue, 22 Aug 2017)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectASTVisitor.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/JumpTableFormatPred.C
M parseAPI/src/SymbolicExpression.C
M parseAPI/src/SymbolicExpression.h
Log Message:
-----------
1. Fix ARM semantics for instructions that use conditional code
2. Make sure to keep multiplication by one and shifting left by zero through visitors and expansion cache
Commit: 74cf2a7bdab6a97a8465336db293d55737ce6124
https://github.com/dyninst/dyninst/commit/74cf2a7bdab6a97a8465336db293d55737ce6124
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-22 (Tue, 22 Aug 2017)
Changed paths:
M dataflowAPI/doc/StackAnalysis.tex
M dataflowAPI/doc/dataflowAPI.pdf
M dataflowAPI/h/stackanalysis.h
M dataflowAPI/src/stackanalysis.C
M dyninstAPI/h/StackMod.h
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI/src/StackMod/StackAccess.C
M symtabAPI/src/emitElf.C
Log Message:
-----------
Merge branch 'github_master' into jumptable_rebase
Commit: e0b9befe7b8a03ff918b00132f496eea9398dec4
https://github.com/dyninst/dyninst/commit/e0b9befe7b8a03ff918b00132f496eea9398dec4
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-23 (Wed, 23 Aug 2017)
Changed paths:
M .gitignore
M CMakeLists.txt
M INSTALL
M cmake/Modules/FindLibDwarf.cmake
M cmake/packages.cmake
M dataflowAPI/rose/semantics/MemoryMap.C
M dataflowAPI/rose/util/Message.C
M dwarf/CMakeLists.txt
M dwarf/h/dwarfExprParser.h
M dwarf/h/dwarfFrameParser.h
M dwarf/h/dwarfHandle.h
M dwarf/h/dwarfResult.h
M dwarf/src/dwarfExprParser.C
M dwarf/src/dwarfFrameParser.C
M dwarf/src/dwarfHandle.C
M dwarf/src/dwarfResult.C
M dynC_API/src/dynC.tab.C
M dyninstAPI/h/BPatch.h
M dyninstAPI/h/BPatch_type.h
M dyninstAPI/src/BPatch_function.C
M dyninstAPI/src/emit-x86.C
M dyninstAPI/src/image.C
M instructionAPI/src/Instruction.C
M parseAPI/src/CodeObject.C
M patchAPI/src/PatchMgr.C
M proccontrol/src/process.C
M stackwalk/h/walker.h
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/dbgstepper-impl.h
M symtabAPI/doc/A-Appendix.tex
M symtabAPI/h/Module.h
M symtabAPI/h/Symtab.h
M symtabAPI/src/Function.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/Variable.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
M symtabAPI/src/emitElf.C
M symtabAPI/src/parseDwarf.C
Log Message:
-----------
Merge branch 'sasha/libdw_deploy' into v9.3.x
Commit: 38e17c89ba4a76329ffd11ebcfec379a04c64b7a
https://github.com/dyninst/dyninst/commit/38e17c89ba4a76329ffd11ebcfec379a04c64b7a
Author: Sasha Nicolas <sasha@xxxxxxxxxxx>
Date: 2017-08-23 (Wed, 23 Aug 2017)
Changed paths:
M dyninstAPI/h/BPatch_type.h
M symtabAPI/src/Object-elf.C
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
Fixing small things after the merge.
Commit: 096962021d551bce15b736d86a87ec36fe6072fa
https://github.com/dyninst/dyninst/commit/096962021d551bce15b736d86a87ec36fe6072fa
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-24 (Thu, 24 Aug 2017)
Changed paths:
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/SymbolicExpression.C
Log Message:
-----------
1. When we find potential indexing variable with table stride being 1, we need to make sure that we have already found the table base to declare this variable as the table index.
2. Add constants multiplication in AST simplification
Commit: 4957dd223d61bb1e8eabac735a51e5c40cf1e4a9
https://github.com/dyninst/dyninst/commit/4957dd223d61bb1e8eabac735a51e5c40cf1e4a9
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-24 (Thu, 24 Aug 2017)
Changed paths:
M .gitignore
R .idea/deployment.xml
R .idea/webServers.xml
M CHANGELOG.md
M CMakeLists.txt
M INSTALL
M appveyor.yml
M cmake/DyninstConfig.cmake.in
M cmake/Modules/FindLibDwarf.cmake
M cmake/packages.cmake
M cmake/shared.cmake
M dataflowAPI/rose/semantics/MemoryMap.C
M dataflowAPI/rose/util/Message.C
M dwarf/CMakeLists.txt
M dwarf/h/dwarfExprParser.h
M dwarf/h/dwarfFrameParser.h
M dwarf/h/dwarfHandle.h
M dwarf/h/dwarfResult.h
M dwarf/src/dwarfExprParser.C
M dwarf/src/dwarfFrameParser.C
M dwarf/src/dwarfHandle.C
M dwarf/src/dwarfResult.C
M dynC_API/src/dynC.tab.C
R dyninstAPI/doc/dyninstAPI.doc
A dyninstAPI/doc/dyninstAPI.docx
M dyninstAPI/doc/dyninstAPI.pdf
M dyninstAPI/h/BPatch.h
M dyninstAPI/h/BPatch_type.h
M dyninstAPI/src/BPatch_function.C
M dyninstAPI/src/BPatch_type.C
M dyninstAPI/src/Parsing.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI/src/binaryEdit.h
M dyninstAPI/src/codegen-power.C
M dyninstAPI/src/dynProcess.C
M dyninstAPI/src/emit-x86.C
M dyninstAPI/src/image.C
M dyninstAPI/src/pcEventHandler.C
M dyninstAPI/src/pcEventMuxer.C
M instructionAPI/doc/API/Instruction.tex
M instructionAPI/src/Instruction.C
M parseAPI/src/CodeObject.C
M patchAPI/src/PatchMgr.C
M proccontrol/src/process.C
M stackwalk/h/walker.h
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/dbgstepper-impl.h
M symtabAPI/doc/A-Appendix.tex
M symtabAPI/h/Function.h
M symtabAPI/h/Module.h
M symtabAPI/h/Symtab.h
M symtabAPI/src/Function.C
M symtabAPI/src/LineInformation.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object-nt.C
M symtabAPI/src/Object-nt.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/Type.C
M symtabAPI/src/Variable.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElf.h
M symtabAPI/src/parseDwarf.C
Log Message:
-----------
Merge branch 'libdw' into jumptable_rebase
Commit: 0f5fea85dbda31d253671a9b6da41f0102a4049c
https://github.com/dyninst/dyninst/commit/0f5fea85dbda31d253671a9b6da41f0102a4049c
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-24 (Thu, 24 Aug 2017)
Changed paths:
M parseAPI/src/SymbolicExpression.C
Log Message:
-----------
Fix symplifying concat operations in jump table analysis
Commit: 25d9e439d1d36d5e5404c3de995320a04dd0ee2a
https://github.com/dyninst/dyninst/commit/25d9e439d1d36d5e5404c3de995320a04dd0ee2a
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-29 (Tue, 29 Aug 2017)
Changed paths:
M symtabAPI/src/LineInformation.C
Log Message:
-----------
Fix uninitialized return value in line info
Commit: 7916e9804d50882ebb700f1e37b2f926e6dd51f7
https://github.com/dyninst/dyninst/commit/7916e9804d50882ebb700f1e37b2f926e6dd51f7
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-29 (Tue, 29 Aug 2017)
Changed paths:
M dyninstAPI/src/dynProcess.C
Log Message:
-----------
We should only set proccontrol level process's data to NULL when the Dyninst level process is the only owner of the proccontrol level process
Commit: 6cf65314975a95bad417af5cc8791c42209989e9
https://github.com/dyninst/dyninst/commit/6cf65314975a95bad417af5cc8791c42209989e9
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-29 (Tue, 29 Aug 2017)
Changed paths:
M common/src/arch-x86.C
Log Message:
-----------
Displacements should be signed integers
Commit: c3b83381951579e04978ced1956979ef0c64d037
https://github.com/dyninst/dyninst/commit/c3b83381951579e04978ced1956979ef0c64d037
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-08-29 (Tue, 29 Aug 2017)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Only do endianess translation for powerpc binaries
Commit: e45835ab0683318a476b3dffdf67b9331e82cb45
https://github.com/dyninst/dyninst/commit/e45835ab0683318a476b3dffdf67b9331e82cb45
Author: Xiaozhu Meng <mxz297@xxxxxxxxx>
Date: 2017-08-29 (Tue, 29 Aug 2017)
Changed paths:
M .gitignore
R .idea/deployment.xml
R .idea/webServers.xml
M CHANGELOG.md
M CMakeLists.txt
M INSTALL
M appveyor.yml
M cmake/DyninstConfig.cmake.in
M cmake/Modules/FindLibDwarf.cmake
M cmake/packages.cmake
M cmake/shared.cmake
A common/docs/decoding_diagram.png
A common/docs/rose_structure.png
M common/h/Graph.h
M common/h/dyn_regs.h
M common/h/entryIDs.h
M common/src/Graph.C
M common/src/arch-x86.C
M common/src/arch-x86.h
M common/src/dyn_regs.C
M dataflowAPI/h/slicing.h
R dataflowAPI/rose/powerpcInstructionSemantics.h
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
A dataflowAPI/rose/semantics/DispatcherPowerpc.C
A dataflowAPI/rose/semantics/DispatcherPowerpc.h
M dataflowAPI/rose/semantics/MemoryMap.C
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/Registers.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/rose/util/Message.C
M dataflowAPI/rose/util/PoolAllocator.h
M dataflowAPI/src/AbslocInterface.C
M dataflowAPI/src/ExpressionConversionVisitor.C
M dataflowAPI/src/RoseImpl.C
M dataflowAPI/src/RoseInsnFactory.C
M dataflowAPI/src/SymEval.C
M dataflowAPI/src/SymbolicExpansion.C
M dataflowAPI/src/SymbolicExpansion.h
M dataflowAPI/src/convertOpcodes.C
M dataflowAPI/src/liveness.C
M dataflowAPI/src/slicing.C
M dataflowAPI/src/stackanalysis.C
M dwarf/CMakeLists.txt
M dwarf/h/dwarfExprParser.h
M dwarf/h/dwarfFrameParser.h
M dwarf/h/dwarfHandle.h
M dwarf/h/dwarfResult.h
M dwarf/src/dwarfExprParser.C
M dwarf/src/dwarfFrameParser.C
M dwarf/src/dwarfHandle.C
M dwarf/src/dwarfResult.C
M dynC_API/src/dynC.tab.C
R dyninstAPI/doc/dyninstAPI.doc
A dyninstAPI/doc/dyninstAPI.docx
M dyninstAPI/doc/dyninstAPI.pdf
M dyninstAPI/h/BPatch.h
M dyninstAPI/h/BPatch_type.h
M dyninstAPI/src/BPatch_function.C
M dyninstAPI/src/BPatch_type.C
M dyninstAPI/src/Parsing.C
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI/src/StackMod/StackAccess.C
M dyninstAPI/src/binaryEdit.h
M dyninstAPI/src/codegen-power.C
M dyninstAPI/src/dynProcess.C
M dyninstAPI/src/emit-x86.C
M dyninstAPI/src/image.C
M dyninstAPI/src/inst-x86.C
M dyninstAPI/src/pcEventHandler.C
M dyninstAPI/src/pcEventMuxer.C
M external/rose/powerpcInstructionEnum.h
M instructionAPI/CMakeLists.txt
A instructionAPI/ISA_ps/abs_advsimd
A instructionAPI/ISA_ps/adc
A instructionAPI/ISA_ps/adcs
A instructionAPI/ISA_ps/add_addsub_ext
A instructionAPI/ISA_ps/add_addsub_imm
A instructionAPI/ISA_ps/add_addsub_shift
A instructionAPI/ISA_ps/add_advsimd
A instructionAPI/ISA_ps/addhn_advsimd
A instructionAPI/ISA_ps/addp_advsimd_pair
A instructionAPI/ISA_ps/addp_advsimd_vec
A instructionAPI/ISA_ps/adds_addsub_ext
A instructionAPI/ISA_ps/adds_addsub_imm
A instructionAPI/ISA_ps/adds_addsub_shift
A instructionAPI/ISA_ps/addv_advsimd
A instructionAPI/ISA_ps/adr
A instructionAPI/ISA_ps/adrp
A instructionAPI/ISA_ps/aesd_advsimd
A instructionAPI/ISA_ps/aese_advsimd
A instructionAPI/ISA_ps/aesimc_advsimd
A instructionAPI/ISA_ps/aesmc_advsimd
A instructionAPI/ISA_ps/and_advsimd
A instructionAPI/ISA_ps/and_log_imm
A instructionAPI/ISA_ps/and_log_shift
A instructionAPI/ISA_ps/ands_log_imm
A instructionAPI/ISA_ps/ands_log_shift
A instructionAPI/ISA_ps/asr_asrv
A instructionAPI/ISA_ps/asr_sbfm
A instructionAPI/ISA_ps/asrv
A instructionAPI/ISA_ps/at_sys
A instructionAPI/ISA_ps/b_cond
A instructionAPI/ISA_ps/b_uncond
A instructionAPI/ISA_ps/bfi_bfm
A instructionAPI/ISA_ps/bfm
A instructionAPI/ISA_ps/bfxil_bfm
A instructionAPI/ISA_ps/bic_advsimd_imm
A instructionAPI/ISA_ps/bic_advsimd_reg
A instructionAPI/ISA_ps/bic_log_shift
A instructionAPI/ISA_ps/bics
A instructionAPI/ISA_ps/bif_advsimd
A instructionAPI/ISA_ps/bit_advsimd
A instructionAPI/ISA_ps/bl
A instructionAPI/ISA_ps/blr
A instructionAPI/ISA_ps/br
A instructionAPI/ISA_ps/brk
A instructionAPI/ISA_ps/bsl_advsimd
A instructionAPI/ISA_ps/cbnz
A instructionAPI/ISA_ps/cbz
A instructionAPI/ISA_ps/ccmn_imm
A instructionAPI/ISA_ps/ccmn_reg
A instructionAPI/ISA_ps/ccmp_imm
A instructionAPI/ISA_ps/ccmp_reg
A instructionAPI/ISA_ps/cinc_csinc
A instructionAPI/ISA_ps/cinv_csinv
A instructionAPI/ISA_ps/clrex
A instructionAPI/ISA_ps/cls_advsimd
A instructionAPI/ISA_ps/cls_int
A instructionAPI/ISA_ps/clz_advsimd
A instructionAPI/ISA_ps/clz_int
A instructionAPI/ISA_ps/cmeq_advsimd_reg
A instructionAPI/ISA_ps/cmeq_advsimd_zero
A instructionAPI/ISA_ps/cmge_advsimd_reg
A instructionAPI/ISA_ps/cmge_advsimd_zero
A instructionAPI/ISA_ps/cmgt_advsimd_reg
A instructionAPI/ISA_ps/cmgt_advsimd_zero
A instructionAPI/ISA_ps/cmhi_advsimd
A instructionAPI/ISA_ps/cmhs_advsimd
A instructionAPI/ISA_ps/cmle_advsimd
A instructionAPI/ISA_ps/cmlt_advsimd
A instructionAPI/ISA_ps/cmn_adds_addsub_ext
A instructionAPI/ISA_ps/cmn_adds_addsub_imm
A instructionAPI/ISA_ps/cmn_adds_addsub_shift
A instructionAPI/ISA_ps/cmp_subs_addsub_ext
A instructionAPI/ISA_ps/cmp_subs_addsub_imm
A instructionAPI/ISA_ps/cmp_subs_addsub_shift
A instructionAPI/ISA_ps/cmtst_advsimd
A instructionAPI/ISA_ps/cneg_csneg
A instructionAPI/ISA_ps/cnt_advsimd
A instructionAPI/ISA_ps/crc32
A instructionAPI/ISA_ps/crc32c
A instructionAPI/ISA_ps/csel
A instructionAPI/ISA_ps/cset_csinc
A instructionAPI/ISA_ps/csetm_csinv
A instructionAPI/ISA_ps/csinc
A instructionAPI/ISA_ps/csinv
A instructionAPI/ISA_ps/csneg
A instructionAPI/ISA_ps/dc_sys
A instructionAPI/ISA_ps/dcps1
A instructionAPI/ISA_ps/dcps2
A instructionAPI/ISA_ps/dcps3
A instructionAPI/ISA_ps/dmb
A instructionAPI/ISA_ps/drps
A instructionAPI/ISA_ps/dsb
A instructionAPI/ISA_ps/dup_advsimd_elt
A instructionAPI/ISA_ps/dup_advsimd_gen
A instructionAPI/ISA_ps/encodingindex
A instructionAPI/ISA_ps/enumerated-symbol-accounts
A instructionAPI/ISA_ps/eon
A instructionAPI/ISA_ps/eor_advsimd
A instructionAPI/ISA_ps/eor_log_imm
A instructionAPI/ISA_ps/eor_log_shift
A instructionAPI/ISA_ps/eret
A instructionAPI/ISA_ps/ext_advsimd
A instructionAPI/ISA_ps/extr
A instructionAPI/ISA_ps/fabd_advsimd
A instructionAPI/ISA_ps/fabs_advsimd
A instructionAPI/ISA_ps/fabs_float
A instructionAPI/ISA_ps/facge_advsimd
A instructionAPI/ISA_ps/facgt_advsimd
A instructionAPI/ISA_ps/fadd_advsimd
A instructionAPI/ISA_ps/fadd_float
A instructionAPI/ISA_ps/faddp_advsimd_pair
A instructionAPI/ISA_ps/faddp_advsimd_vec
A instructionAPI/ISA_ps/fccmp_float
A instructionAPI/ISA_ps/fccmpe_float
A instructionAPI/ISA_ps/fcmeq_advsimd_reg
A instructionAPI/ISA_ps/fcmeq_advsimd_zero
A instructionAPI/ISA_ps/fcmge_advsimd_reg
A instructionAPI/ISA_ps/fcmge_advsimd_zero
A instructionAPI/ISA_ps/fcmgt_advsimd_reg
A instructionAPI/ISA_ps/fcmgt_advsimd_zero
A instructionAPI/ISA_ps/fcmle_advsimd
A instructionAPI/ISA_ps/fcmlt_advsimd
A instructionAPI/ISA_ps/fcmp_float
A instructionAPI/ISA_ps/fcmpe_float
A instructionAPI/ISA_ps/fcsel_float
A instructionAPI/ISA_ps/fcvt_float
A instructionAPI/ISA_ps/fcvtas_advsimd
A instructionAPI/ISA_ps/fcvtas_float
A instructionAPI/ISA_ps/fcvtau_advsimd
A instructionAPI/ISA_ps/fcvtau_float
A instructionAPI/ISA_ps/fcvtl_advsimd
A instructionAPI/ISA_ps/fcvtms_advsimd
A instructionAPI/ISA_ps/fcvtms_float
A instructionAPI/ISA_ps/fcvtmu_advsimd
A instructionAPI/ISA_ps/fcvtmu_float
A instructionAPI/ISA_ps/fcvtn_advsimd
A instructionAPI/ISA_ps/fcvtns_advsimd
A instructionAPI/ISA_ps/fcvtns_float
A instructionAPI/ISA_ps/fcvtnu_advsimd
A instructionAPI/ISA_ps/fcvtnu_float
A instructionAPI/ISA_ps/fcvtps_advsimd
A instructionAPI/ISA_ps/fcvtps_float
A instructionAPI/ISA_ps/fcvtpu_advsimd
A instructionAPI/ISA_ps/fcvtpu_float
A instructionAPI/ISA_ps/fcvtxn_advsimd
A instructionAPI/ISA_ps/fcvtzs_advsimd_fix
A instructionAPI/ISA_ps/fcvtzs_advsimd_int
A instructionAPI/ISA_ps/fcvtzs_float_fix
A instructionAPI/ISA_ps/fcvtzs_float_int
A instructionAPI/ISA_ps/fcvtzu_advsimd_fix
A instructionAPI/ISA_ps/fcvtzu_advsimd_int
A instructionAPI/ISA_ps/fcvtzu_float_fix
A instructionAPI/ISA_ps/fcvtzu_float_int
A instructionAPI/ISA_ps/fdiv_advsimd
A instructionAPI/ISA_ps/fdiv_float
A instructionAPI/ISA_ps/fmadd_float
A instructionAPI/ISA_ps/fmax_advsimd
A instructionAPI/ISA_ps/fmax_float
A instructionAPI/ISA_ps/fmaxnm_advsimd
A instructionAPI/ISA_ps/fmaxnm_float
A instructionAPI/ISA_ps/fmaxnmp_advsimd_pair
A instructionAPI/ISA_ps/fmaxnmp_advsimd_vec
A instructionAPI/ISA_ps/fmaxnmv_advsimd
A instructionAPI/ISA_ps/fmaxp_advsimd_pair
A instructionAPI/ISA_ps/fmaxp_advsimd_vec
A instructionAPI/ISA_ps/fmaxv_advsimd
A instructionAPI/ISA_ps/fmin_advsimd
A instructionAPI/ISA_ps/fmin_float
A instructionAPI/ISA_ps/fminnm_advsimd
A instructionAPI/ISA_ps/fminnm_float
A instructionAPI/ISA_ps/fminnmp_advsimd_pair
A instructionAPI/ISA_ps/fminnmp_advsimd_vec
A instructionAPI/ISA_ps/fminnmv_advsimd
A instructionAPI/ISA_ps/fminp_advsimd_pair
A instructionAPI/ISA_ps/fminp_advsimd_vec
A instructionAPI/ISA_ps/fminv_advsimd
A instructionAPI/ISA_ps/fmla_advsimd_elt
A instructionAPI/ISA_ps/fmla_advsimd_vec
A instructionAPI/ISA_ps/fmls_advsimd_elt
A instructionAPI/ISA_ps/fmls_advsimd_vec
A instructionAPI/ISA_ps/fmov_advsimd
A instructionAPI/ISA_ps/fmov_float
A instructionAPI/ISA_ps/fmov_float_gen
A instructionAPI/ISA_ps/fmov_float_imm
A instructionAPI/ISA_ps/fmsub_float
A instructionAPI/ISA_ps/fmul_advsimd_elt
A instructionAPI/ISA_ps/fmul_advsimd_vec
A instructionAPI/ISA_ps/fmul_float
A instructionAPI/ISA_ps/fmulx_advsimd_elt
A instructionAPI/ISA_ps/fmulx_advsimd_vec
A instructionAPI/ISA_ps/fneg_advsimd
A instructionAPI/ISA_ps/fneg_float
A instructionAPI/ISA_ps/fnmadd_float
A instructionAPI/ISA_ps/fnmsub_float
A instructionAPI/ISA_ps/fnmul_float
A instructionAPI/ISA_ps/fpsimdindex
A instructionAPI/ISA_ps/frecpe_advsimd
A instructionAPI/ISA_ps/frecps_advsimd
A instructionAPI/ISA_ps/frecpx_advsimd
A instructionAPI/ISA_ps/frinta_advsimd
A instructionAPI/ISA_ps/frinta_float
A instructionAPI/ISA_ps/frinti_advsimd
A instructionAPI/ISA_ps/frinti_float
A instructionAPI/ISA_ps/frintm_advsimd
A instructionAPI/ISA_ps/frintm_float
A instructionAPI/ISA_ps/frintn_advsimd
A instructionAPI/ISA_ps/frintn_float
A instructionAPI/ISA_ps/frintp_advsimd
A instructionAPI/ISA_ps/frintp_float
A instructionAPI/ISA_ps/frintx_advsimd
A instructionAPI/ISA_ps/frintx_float
A instructionAPI/ISA_ps/frintz_advsimd
A instructionAPI/ISA_ps/frintz_float
A instructionAPI/ISA_ps/frsqrte_advsimd
A instructionAPI/ISA_ps/frsqrts_advsimd
A instructionAPI/ISA_ps/fsqrt_advsimd
A instructionAPI/ISA_ps/fsqrt_float
A instructionAPI/ISA_ps/fsub_advsimd
A instructionAPI/ISA_ps/fsub_float
A instructionAPI/ISA_ps/hint
A instructionAPI/ISA_ps/hlt
A instructionAPI/ISA_ps/hvc
A instructionAPI/ISA_ps/ic_sys
A instructionAPI/ISA_ps/index
A instructionAPI/ISA_ps/ins_advsimd_elt
A instructionAPI/ISA_ps/ins_advsimd_gen
A instructionAPI/ISA_ps/isb
A instructionAPI/ISA_ps/ld1_advsimd_mult
A instructionAPI/ISA_ps/ld1_advsimd_sngl
A instructionAPI/ISA_ps/ld1r_advsimd
A instructionAPI/ISA_ps/ld2_advsimd_mult
A instructionAPI/ISA_ps/ld2_advsimd_sngl
A instructionAPI/ISA_ps/ld2r_advsimd
A instructionAPI/ISA_ps/ld3_advsimd_mult
A instructionAPI/ISA_ps/ld3_advsimd_sngl
A instructionAPI/ISA_ps/ld3r_advsimd
A instructionAPI/ISA_ps/ld4_advsimd_mult
A instructionAPI/ISA_ps/ld4_advsimd_sngl
A instructionAPI/ISA_ps/ld4r_advsimd
A instructionAPI/ISA_ps/ldar
A instructionAPI/ISA_ps/ldarb
A instructionAPI/ISA_ps/ldarh
A instructionAPI/ISA_ps/ldaxp
A instructionAPI/ISA_ps/ldaxr
A instructionAPI/ISA_ps/ldaxrb
A instructionAPI/ISA_ps/ldaxrh
A instructionAPI/ISA_ps/ldnp_fpsimd
A instructionAPI/ISA_ps/ldnp_gen
A instructionAPI/ISA_ps/ldp_fpsimd
A instructionAPI/ISA_ps/ldp_gen
A instructionAPI/ISA_ps/ldpsw
A instructionAPI/ISA_ps/ldr_imm_fpsimd
A instructionAPI/ISA_ps/ldr_imm_gen
A instructionAPI/ISA_ps/ldr_lit_fpsimd
A instructionAPI/ISA_ps/ldr_lit_gen
A instructionAPI/ISA_ps/ldr_reg_fpsimd
A instructionAPI/ISA_ps/ldr_reg_gen
A instructionAPI/ISA_ps/ldrb_imm
A instructionAPI/ISA_ps/ldrb_reg
A instructionAPI/ISA_ps/ldrh_imm
A instructionAPI/ISA_ps/ldrh_reg
A instructionAPI/ISA_ps/ldrsb_imm
A instructionAPI/ISA_ps/ldrsb_reg
A instructionAPI/ISA_ps/ldrsh_imm
A instructionAPI/ISA_ps/ldrsh_reg
A instructionAPI/ISA_ps/ldrsw_imm
A instructionAPI/ISA_ps/ldrsw_lit
A instructionAPI/ISA_ps/ldrsw_reg
A instructionAPI/ISA_ps/ldtr
A instructionAPI/ISA_ps/ldtrb
A instructionAPI/ISA_ps/ldtrh
A instructionAPI/ISA_ps/ldtrsb
A instructionAPI/ISA_ps/ldtrsh
A instructionAPI/ISA_ps/ldtrsw
A instructionAPI/ISA_ps/ldur_fpsimd
A instructionAPI/ISA_ps/ldur_gen
A instructionAPI/ISA_ps/ldurb
A instructionAPI/ISA_ps/ldurh
A instructionAPI/ISA_ps/ldursb
A instructionAPI/ISA_ps/ldursh
A instructionAPI/ISA_ps/ldursw
A instructionAPI/ISA_ps/ldxp
A instructionAPI/ISA_ps/ldxr
A instructionAPI/ISA_ps/ldxrb
A instructionAPI/ISA_ps/ldxrh
A instructionAPI/ISA_ps/lsl_lslv
A instructionAPI/ISA_ps/lsl_ubfm
A instructionAPI/ISA_ps/lslv
A instructionAPI/ISA_ps/lsr_lsrv
A instructionAPI/ISA_ps/lsr_ubfm
A instructionAPI/ISA_ps/lsrv
A instructionAPI/ISA_ps/madd
A instructionAPI/ISA_ps/mla_advsimd_elt
A instructionAPI/ISA_ps/mla_advsimd_vec
A instructionAPI/ISA_ps/mls_advsimd_elt
A instructionAPI/ISA_ps/mls_advsimd_vec
A instructionAPI/ISA_ps/mneg_msub
A instructionAPI/ISA_ps/mov_add_addsub_imm
A instructionAPI/ISA_ps/mov_dup_advsimd_elt
A instructionAPI/ISA_ps/mov_ins_advsimd_elt
A instructionAPI/ISA_ps/mov_ins_advsimd_gen
A instructionAPI/ISA_ps/mov_movn
A instructionAPI/ISA_ps/mov_movz
A instructionAPI/ISA_ps/mov_orr_advsimd_reg
A instructionAPI/ISA_ps/mov_orr_log_imm
A instructionAPI/ISA_ps/mov_orr_log_shift
A instructionAPI/ISA_ps/mov_umov_advsimd
A instructionAPI/ISA_ps/movi_advsimd
A instructionAPI/ISA_ps/movk
A instructionAPI/ISA_ps/movn
A instructionAPI/ISA_ps/movz
A instructionAPI/ISA_ps/mrs
A instructionAPI/ISA_ps/msr_imm
A instructionAPI/ISA_ps/msr_reg
A instructionAPI/ISA_ps/msub
A instructionAPI/ISA_ps/mul_advsimd_elt
A instructionAPI/ISA_ps/mul_advsimd_vec
A instructionAPI/ISA_ps/mul_madd
A instructionAPI/ISA_ps/mvn_not_advsimd
A instructionAPI/ISA_ps/mvn_orn_log_shift
A instructionAPI/ISA_ps/mvni_advsimd
A instructionAPI/ISA_ps/neg_advsimd
A instructionAPI/ISA_ps/neg_sub_addsub_shift
A instructionAPI/ISA_ps/negs_subs_addsub_shift
A instructionAPI/ISA_ps/ngc_sbc
A instructionAPI/ISA_ps/ngcs_sbcs
A instructionAPI/ISA_ps/nop_hint
A instructionAPI/ISA_ps/not_advsimd
A instructionAPI/ISA_ps/orn_advsimd
A instructionAPI/ISA_ps/orn_log_shift
A instructionAPI/ISA_ps/orr_advsimd_imm
A instructionAPI/ISA_ps/orr_advsimd_reg
A instructionAPI/ISA_ps/orr_log_imm
A instructionAPI/ISA_ps/orr_log_shift
A instructionAPI/ISA_ps/permindex
A instructionAPI/ISA_ps/pmul_advsimd
A instructionAPI/ISA_ps/pmull_advsimd
A instructionAPI/ISA_ps/prfm_imm
A instructionAPI/ISA_ps/prfm_lit
A instructionAPI/ISA_ps/prfm_reg
A instructionAPI/ISA_ps/prfum
A instructionAPI/ISA_ps/raddhn_advsimd
A instructionAPI/ISA_ps/rbit_advsimd
A instructionAPI/ISA_ps/rbit_int
A instructionAPI/ISA_ps/ret
A instructionAPI/ISA_ps/rev
A instructionAPI/ISA_ps/rev16_advsimd
A instructionAPI/ISA_ps/rev16_int
A instructionAPI/ISA_ps/rev32_advsimd
A instructionAPI/ISA_ps/rev32_int
A instructionAPI/ISA_ps/rev64_advsimd
A instructionAPI/ISA_ps/ror_extr
A instructionAPI/ISA_ps/ror_rorv
A instructionAPI/ISA_ps/rorv
A instructionAPI/ISA_ps/rshrn_advsimd
A instructionAPI/ISA_ps/rsubhn_advsimd
A instructionAPI/ISA_ps/saba_advsimd
A instructionAPI/ISA_ps/sabal_advsimd
A instructionAPI/ISA_ps/sabd_advsimd
A instructionAPI/ISA_ps/sabdl_advsimd
A instructionAPI/ISA_ps/sadalp_advsimd
A instructionAPI/ISA_ps/saddl_advsimd
A instructionAPI/ISA_ps/saddlp_advsimd
A instructionAPI/ISA_ps/saddlv_advsimd
A instructionAPI/ISA_ps/saddw_advsimd
A instructionAPI/ISA_ps/sbc
A instructionAPI/ISA_ps/sbcs
A instructionAPI/ISA_ps/sbfiz_sbfm
A instructionAPI/ISA_ps/sbfm
A instructionAPI/ISA_ps/sbfx_sbfm
A instructionAPI/ISA_ps/scvtf_advsimd_fix
A instructionAPI/ISA_ps/scvtf_advsimd_int
A instructionAPI/ISA_ps/scvtf_float_fix
A instructionAPI/ISA_ps/scvtf_float_int
A instructionAPI/ISA_ps/sdiv
A instructionAPI/ISA_ps/sev_hint
A instructionAPI/ISA_ps/sevl_hint
A instructionAPI/ISA_ps/sha1c_advsimd
A instructionAPI/ISA_ps/sha1h_advsimd
A instructionAPI/ISA_ps/sha1m_advsimd
A instructionAPI/ISA_ps/sha1p_advsimd
A instructionAPI/ISA_ps/sha1su0_advsimd
A instructionAPI/ISA_ps/sha1su1_advsimd
A instructionAPI/ISA_ps/sha256h2_advsimd
A instructionAPI/ISA_ps/sha256h_advsimd
A instructionAPI/ISA_ps/sha256su0_advsimd
A instructionAPI/ISA_ps/sha256su1_advsimd
A instructionAPI/ISA_ps/shadd_advsimd
A instructionAPI/ISA_ps/shared_pseudocode
A instructionAPI/ISA_ps/shl_advsimd
A instructionAPI/ISA_ps/shll_advsimd
A instructionAPI/ISA_ps/shrn_advsimd
A instructionAPI/ISA_ps/shsub_advsimd
A instructionAPI/ISA_ps/sli_advsimd
A instructionAPI/ISA_ps/smaddl
A instructionAPI/ISA_ps/smax_advsimd
A instructionAPI/ISA_ps/smaxp_advsimd
A instructionAPI/ISA_ps/smaxv_advsimd
A instructionAPI/ISA_ps/smc
A instructionAPI/ISA_ps/smin_advsimd
A instructionAPI/ISA_ps/sminp_advsimd
A instructionAPI/ISA_ps/sminv_advsimd
A instructionAPI/ISA_ps/smlal_advsimd_elt
A instructionAPI/ISA_ps/smlal_advsimd_vec
A instructionAPI/ISA_ps/smlsl_advsimd_elt
A instructionAPI/ISA_ps/smlsl_advsimd_vec
A instructionAPI/ISA_ps/smnegl_smsubl
A instructionAPI/ISA_ps/smov_advsimd
A instructionAPI/ISA_ps/smsubl
A instructionAPI/ISA_ps/smulh
A instructionAPI/ISA_ps/smull_advsimd_elt
A instructionAPI/ISA_ps/smull_advsimd_vec
A instructionAPI/ISA_ps/smull_smaddl
A instructionAPI/ISA_ps/sqabs_advsimd
A instructionAPI/ISA_ps/sqadd_advsimd
A instructionAPI/ISA_ps/sqdmlal_advsimd_elt
A instructionAPI/ISA_ps/sqdmlal_advsimd_vec
A instructionAPI/ISA_ps/sqdmlsl_advsimd_elt
A instructionAPI/ISA_ps/sqdmlsl_advsimd_vec
A instructionAPI/ISA_ps/sqdmulh_advsimd_elt
A instructionAPI/ISA_ps/sqdmulh_advsimd_vec
A instructionAPI/ISA_ps/sqdmull_advsimd_elt
A instructionAPI/ISA_ps/sqdmull_advsimd_vec
A instructionAPI/ISA_ps/sqneg_advsimd
A instructionAPI/ISA_ps/sqrdmulh_advsimd_elt
A instructionAPI/ISA_ps/sqrdmulh_advsimd_vec
A instructionAPI/ISA_ps/sqrshl_advsimd
A instructionAPI/ISA_ps/sqrshrn_advsimd
A instructionAPI/ISA_ps/sqrshrun_advsimd
A instructionAPI/ISA_ps/sqshl_advsimd_imm
A instructionAPI/ISA_ps/sqshl_advsimd_reg
A instructionAPI/ISA_ps/sqshlu_advsimd
A instructionAPI/ISA_ps/sqshrn_advsimd
A instructionAPI/ISA_ps/sqshrun_advsimd
A instructionAPI/ISA_ps/sqsub_advsimd
A instructionAPI/ISA_ps/sqxtn_advsimd
A instructionAPI/ISA_ps/sqxtun_advsimd
A instructionAPI/ISA_ps/srhadd_advsimd
A instructionAPI/ISA_ps/sri_advsimd
A instructionAPI/ISA_ps/srshl_advsimd
A instructionAPI/ISA_ps/srshr_advsimd
A instructionAPI/ISA_ps/srsra_advsimd
A instructionAPI/ISA_ps/sshl_advsimd
A instructionAPI/ISA_ps/sshll_advsimd
A instructionAPI/ISA_ps/sshr_advsimd
A instructionAPI/ISA_ps/ssra_advsimd
A instructionAPI/ISA_ps/ssubl_advsimd
A instructionAPI/ISA_ps/ssubw_advsimd
A instructionAPI/ISA_ps/st1_advsimd_mult
A instructionAPI/ISA_ps/st1_advsimd_sngl
A instructionAPI/ISA_ps/st2_advsimd_mult
A instructionAPI/ISA_ps/st2_advsimd_sngl
A instructionAPI/ISA_ps/st3_advsimd_mult
A instructionAPI/ISA_ps/st3_advsimd_sngl
A instructionAPI/ISA_ps/st4_advsimd_mult
A instructionAPI/ISA_ps/st4_advsimd_sngl
A instructionAPI/ISA_ps/stlr
A instructionAPI/ISA_ps/stlrb
A instructionAPI/ISA_ps/stlrh
A instructionAPI/ISA_ps/stlxp
A instructionAPI/ISA_ps/stlxr
A instructionAPI/ISA_ps/stlxrb
A instructionAPI/ISA_ps/stlxrh
A instructionAPI/ISA_ps/stnp_fpsimd
A instructionAPI/ISA_ps/stnp_gen
A instructionAPI/ISA_ps/stp_fpsimd
A instructionAPI/ISA_ps/stp_gen
A instructionAPI/ISA_ps/str_imm_fpsimd
A instructionAPI/ISA_ps/str_imm_gen
A instructionAPI/ISA_ps/str_reg_fpsimd
A instructionAPI/ISA_ps/str_reg_gen
A instructionAPI/ISA_ps/strb_imm
A instructionAPI/ISA_ps/strb_reg
A instructionAPI/ISA_ps/strh_imm
A instructionAPI/ISA_ps/strh_reg
A instructionAPI/ISA_ps/sttr
A instructionAPI/ISA_ps/sttrb
A instructionAPI/ISA_ps/sttrh
A instructionAPI/ISA_ps/stur_fpsimd
A instructionAPI/ISA_ps/stur_gen
A instructionAPI/ISA_ps/sturb
A instructionAPI/ISA_ps/sturh
A instructionAPI/ISA_ps/stxp
A instructionAPI/ISA_ps/stxr
A instructionAPI/ISA_ps/stxrb
A instructionAPI/ISA_ps/stxrh
A instructionAPI/ISA_ps/sub_addsub_ext
A instructionAPI/ISA_ps/sub_addsub_imm
A instructionAPI/ISA_ps/sub_addsub_shift
A instructionAPI/ISA_ps/sub_advsimd
A instructionAPI/ISA_ps/subhn_advsimd
A instructionAPI/ISA_ps/subs_addsub_ext
A instructionAPI/ISA_ps/subs_addsub_imm
A instructionAPI/ISA_ps/subs_addsub_shift
A instructionAPI/ISA_ps/suqadd_advsimd
A instructionAPI/ISA_ps/svc
A instructionAPI/ISA_ps/sxtb_sbfm
A instructionAPI/ISA_ps/sxth_sbfm
A instructionAPI/ISA_ps/sxtl_sshll_advsimd
A instructionAPI/ISA_ps/sxtw_sbfm
A instructionAPI/ISA_ps/sys
A instructionAPI/ISA_ps/sysl
A instructionAPI/ISA_ps/tbl_advsimd
A instructionAPI/ISA_ps/tbnz
A instructionAPI/ISA_ps/tbx_advsimd
A instructionAPI/ISA_ps/tbz
A instructionAPI/ISA_ps/temp.py
A instructionAPI/ISA_ps/tlbi_sys
A instructionAPI/ISA_ps/trn1_advsimd
A instructionAPI/ISA_ps/trn2_advsimd
A instructionAPI/ISA_ps/tst_ands_log_imm
A instructionAPI/ISA_ps/tst_ands_log_shift
A instructionAPI/ISA_ps/uaba_advsimd
A instructionAPI/ISA_ps/uabal_advsimd
A instructionAPI/ISA_ps/uabd_advsimd
A instructionAPI/ISA_ps/uabdl_advsimd
A instructionAPI/ISA_ps/uadalp_advsimd
A instructionAPI/ISA_ps/uaddl_advsimd
A instructionAPI/ISA_ps/uaddlp_advsimd
A instructionAPI/ISA_ps/uaddlv_advsimd
A instructionAPI/ISA_ps/uaddw_advsimd
A instructionAPI/ISA_ps/ubfiz_ubfm
A instructionAPI/ISA_ps/ubfm
A instructionAPI/ISA_ps/ubfx_ubfm
A instructionAPI/ISA_ps/ucvtf_advsimd_fix
A instructionAPI/ISA_ps/ucvtf_advsimd_int
A instructionAPI/ISA_ps/ucvtf_float_fix
A instructionAPI/ISA_ps/ucvtf_float_int
A instructionAPI/ISA_ps/udiv
A instructionAPI/ISA_ps/uhadd_advsimd
A instructionAPI/ISA_ps/uhsub_advsimd
A instructionAPI/ISA_ps/umaddl
A instructionAPI/ISA_ps/umax_advsimd
A instructionAPI/ISA_ps/umaxp_advsimd
A instructionAPI/ISA_ps/umaxv_advsimd
A instructionAPI/ISA_ps/umin_advsimd
A instructionAPI/ISA_ps/uminp_advsimd
A instructionAPI/ISA_ps/uminv_advsimd
A instructionAPI/ISA_ps/umlal_advsimd_elt
A instructionAPI/ISA_ps/umlal_advsimd_vec
A instructionAPI/ISA_ps/umlsl_advsimd_elt
A instructionAPI/ISA_ps/umlsl_advsimd_vec
A instructionAPI/ISA_ps/umnegl_umsubl
A instructionAPI/ISA_ps/umov_advsimd
A instructionAPI/ISA_ps/umsubl
A instructionAPI/ISA_ps/umulh
A instructionAPI/ISA_ps/umull_advsimd_elt
A instructionAPI/ISA_ps/umull_advsimd_vec
A instructionAPI/ISA_ps/umull_umaddl
A instructionAPI/ISA_ps/uqadd_advsimd
A instructionAPI/ISA_ps/uqrshl_advsimd
A instructionAPI/ISA_ps/uqrshrn_advsimd
A instructionAPI/ISA_ps/uqshl_advsimd_imm
A instructionAPI/ISA_ps/uqshl_advsimd_reg
A instructionAPI/ISA_ps/uqshrn_advsimd
A instructionAPI/ISA_ps/uqsub_advsimd
A instructionAPI/ISA_ps/uqxtn_advsimd
A instructionAPI/ISA_ps/urecpe_advsimd
A instructionAPI/ISA_ps/urhadd_advsimd
A instructionAPI/ISA_ps/urshl_advsimd
A instructionAPI/ISA_ps/urshr_advsimd
A instructionAPI/ISA_ps/ursqrte_advsimd
A instructionAPI/ISA_ps/ursra_advsimd
A instructionAPI/ISA_ps/ushl_advsimd
A instructionAPI/ISA_ps/ushll_advsimd
A instructionAPI/ISA_ps/ushr_advsimd
A instructionAPI/ISA_ps/usqadd_advsimd
A instructionAPI/ISA_ps/usra_advsimd
A instructionAPI/ISA_ps/usubl_advsimd
A instructionAPI/ISA_ps/usubw_advsimd
A instructionAPI/ISA_ps/uxtb_ubfm
A instructionAPI/ISA_ps/uxth_ubfm
A instructionAPI/ISA_ps/uxtl_ushll_advsimd
A instructionAPI/ISA_ps/uzp1_advsimd
A instructionAPI/ISA_ps/uzp2_advsimd
A instructionAPI/ISA_ps/wfe_hint
A instructionAPI/ISA_ps/wfi_hint
A instructionAPI/ISA_ps/xtn_advsimd
A instructionAPI/ISA_ps/yield_hint
A instructionAPI/ISA_ps/zip1_advsimd
A instructionAPI/ISA_ps/zip2_advsimd
A instructionAPI/aarch64_pseudocode_extractor.py
M instructionAPI/doc/API/Instruction.tex
A instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/h/BinaryFunction.h
M instructionAPI/h/Dereference.h
M instructionAPI/h/Expression.h
M instructionAPI/h/Immediate.h
M instructionAPI/h/Instruction.h
M instructionAPI/h/InstructionAST.h
M instructionAPI/h/Operand.h
M instructionAPI/h/Register.h
M instructionAPI/h/Result.h
M instructionAPI/h/Visitor.h
A instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/Immediate.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/InstructionDecoder-aarch64.h
M instructionAPI/src/InstructionDecoder-power.C
M instructionAPI/src/InstructionDecoder-power.h
M instructionAPI/src/InstructionDecoder-x86.C
M instructionAPI/src/InstructionDecoder-x86.h
M instructionAPI/src/Operand.C
M instructionAPI/src/Register.C
M instructionAPI/src/aarch64_opcode_tables.C
M instructionAPI/src/power_opcode_tables.C
M parseAPI/CMakeLists.txt
M parseAPI/h/CodeObject.h
M parseAPI/h/CodeSource.h
M parseAPI/src/Block.C
M parseAPI/src/BoundFactCalculator.C
M parseAPI/src/BoundFactCalculator.h
M parseAPI/src/BoundFactData.C
M parseAPI/src/BoundFactData.h
M parseAPI/src/CodeObject.C
M parseAPI/src/CodeSource.C
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_IAPI.h
M parseAPI/src/IA_InstrucIter.C
M parseAPI/src/IA_aarch64.C
A parseAPI/src/IA_aarch64.h
R parseAPI/src/IA_aarch64Details.C
R parseAPI/src/IA_aarch64Details.h
R parseAPI/src/IA_platformDetails.h
R parseAPI/src/IA_platformDetailsFactory.C
M parseAPI/src/IA_power.C
M parseAPI/src/IA_power.h
R parseAPI/src/IA_powerDetails.C
R parseAPI/src/IA_powerDetails.h
M parseAPI/src/IA_x86.C
A parseAPI/src/IA_x86.h
R parseAPI/src/IA_x86Details.C
R parseAPI/src/IA_x86Details.h
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectASTVisitor.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/IndirectAnalyzer.h
R parseAPI/src/InstructionSource-aarch64.C
R parseAPI/src/InstructionSource-power.C
R parseAPI/src/InstructionSource-x86.C
A parseAPI/src/JumpTableFormatPred.C
A parseAPI/src/JumpTableFormatPred.h
A parseAPI/src/JumpTableIndexPred.C
A parseAPI/src/JumpTableIndexPred.h
R parseAPI/src/JumpTablePred.C
R parseAPI/src/JumpTablePred.h
M parseAPI/src/ParseData.C
M parseAPI/src/ParseData.h
M parseAPI/src/Parser-speculative.C
M parseAPI/src/Parser.C
M parseAPI/src/Parser.h
M parseAPI/src/ParserDetails.C
M parseAPI/src/ParserDetails.h
A parseAPI/src/SymbolicExpression.C
A parseAPI/src/SymbolicExpression.h
M parseAPI/src/SymtabCodeSource.C
M patchAPI/src/PatchMgr.C
M proccontrol/src/process.C
M stackwalk/h/walker.h
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/dbgstepper-impl.h
M symtabAPI/doc/A-Appendix.tex
M symtabAPI/h/Function.h
M symtabAPI/h/Module.h
M symtabAPI/h/Symtab.h
M symtabAPI/src/Function.C
M symtabAPI/src/LineInformation.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object-nt.C
M symtabAPI/src/Object-nt.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/Type.C
M symtabAPI/src/Variable.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElf.h
M symtabAPI/src/parseDwarf.C
Log Message:
-----------
Merge pull request #401 from mxz297/jumptable_merge
Merging my jump table improvements, att_syntax, arm semantics, v9.3.x, and libdw
Commit: aa0b62cd781016dbdf79406c65ffe3ab73363a04
https://github.com/dyninst/dyninst/commit/aa0b62cd781016dbdf79406c65ffe3ab73363a04
Author: John Mellor-Crummey <johnmc@xxxxxxxx>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
don't skip the first line in all but first range.
(cherry picked from commit 5b8cf9fd1aaf877feeed2971fc9d2f952d06fa7e)
Commit: 689250b55969cc41e630f9c5b3752ee04d5f69fe
https://github.com/dyninst/dyninst/commit/689250b55969cc41e630f9c5b3752ee04d5f69fe
Author: John Mellor-Crummey <johnmc@xxxxxxxx>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
improve fix to dwarf line reading.
(cherry picked from commit f5f04afc71e8318f9295b209e8ee60600d156ae6)
Commit: e4ee9b92a9a7e2c16e06517b898b8e8f7ad800fb
https://github.com/dyninst/dyninst/commit/e4ee9b92a9a7e2c16e06517b898b8e8f7ad800fb
Author: John Mellor-Crummey <johnmc@xxxxxxxx>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
temporary patch to dwarfWalker
returning false for getFrameBase prevented processing
of multiple levels of inlined functions in CUBINs
(cherry picked from commit e91fb8670dc5884db902a678a00f48466b126ced)
Commit: 8047bcb1e0eeb27067816eb884149d69e890ba69
https://github.com/dyninst/dyninst/commit/8047bcb1e0eeb27067816eb884149d69e890ba69
Author: Ray Chen <rchen@xxxxxxxxxx>
Date: 2017-09-07 (Thu, 07 Sep 2017)
Changed paths:
M cmake/cap_arch_def.cmake
M cmake/platform_unix.cmake
M common/CMakeLists.txt
A common/h/aarch32_opcode_autogen.h
A common/h/aarch32_sys_regs.h
M common/h/dyn_regs.h
M common/h/entryIDs.h
A common/src/arch-aarch32.C
A common/src/arch-aarch32.h
M common/src/arch-x86.C
M common/src/arch.h
M common/src/dyn_regs.C
M dataflowAPI/src/ABI.C
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/BPatch_snippet.C
A dyninstAPI/src/RegisterConversion-aarch32.C
A dyninstAPI/src/Relocation/Widgets/CFWidget-aarch32.C
M dyninstAPI/src/Relocation/Widgets/CFWidget.h
M dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
A dyninstAPI/src/codegen-aarch32.C
A dyninstAPI/src/codegen-aarch32.h
M dyninstAPI/src/codegen.h
A dyninstAPI/src/emit-aarch32.h
A dyninstAPI/src/inst-aarch32.C
A dyninstAPI/src/inst-aarch32.h
M dyninstAPI/src/legacy-instruction.h
A dyninstAPI/src/linux-aarch32.C
A dyninstAPI/src/linux-aarch32.h
M dyninstAPI/src/linux.h
A dyninstAPI/src/parse-aarch32.C
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
A dyninstAPI/src/stackwalk-aarch32.C
M dyninstAPI_RT/src/RTlinux.c
M instructionAPI/CMakeLists.txt
M instructionAPI/arm_manual_parser.py
M instructionAPI/arm_sysreg_builder.py
M instructionAPI/h/Instruction.h
M instructionAPI/h/Operation.h
M instructionAPI/src/InstructionCategories.C
A instructionAPI/src/InstructionDecoder-aarch32.C
A instructionAPI/src/InstructionDecoder-aarch32.h
M instructionAPI/src/InstructionDecoder-power.C
M instructionAPI/src/InstructionDecoder-power.h
M instructionAPI/src/InstructionDecoderImpl.C
M instructionAPI/src/Operation.C
A instructionAPI/src/aarch32_decoder_autogen.C
A instructionAPI/src/aarch32_decoder_autogen.h
M parseAPI/CMakeLists.txt
M parseAPI/src/IA_IAPI.C
A parseAPI/src/IA_aarch32.C
A parseAPI/src/IA_aarch32Details.C
A parseAPI/src/IA_aarch32Details.h
M parseAPI/src/IA_platformDetailsFactory.C
A parseAPI/src/InstructionSource-aarch32.C
M proccontrol/src/linux.C
M scripts/dynsysname
M stackwalk/CMakeLists.txt
A stackwalk/src/aarch32-swk.C
A stackwalk/src/aarch32-swk.h
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/framestepper.C
A stackwalk/src/linux-aarch32-swk.C
M stackwalk/src/x86-swk.C
M symtabAPI/CMakeLists.txt
A symtabAPI/src/emitElfStatic-aarch32.C
A symtabAPI/src/relocationEntry-elf-aarch32.C
Log Message:
-----------
Update with all work through 9/6/2017.
Dyninst successfully builds under platform aarch32-unknown-linux and
allows CFGTool (http://www.paradyn.org/html/tools/CFGTool.html) to
perform reasonably.
Commit: 27e4fe02f90e68d73274a0daf74b28896ae32e72
https://github.com/dyninst/dyninst/commit/27e4fe02f90e68d73274a0daf74b28896ae32e72
Author: Ray Chen <rchen@xxxxxxxxxx>
Date: 2017-09-07 (Thu, 07 Sep 2017)
Changed paths:
M instructionAPI/arm_manual_parser.py
M instructionAPI/src/aarch32_decoder_autogen.C
Log Message:
-----------
Remove debugging output.
This commit removes two pieces of debugging output:
1) Removes instruction identifier from mnemonic.
2) Sets DEBUG_AARCH32_DECODE macro to zero.
Commit: dc0db4179023035f78c3a7e8bd3d87910ebc8eca
https://github.com/dyninst/dyninst/commit/dc0db4179023035f78c3a7e8bd3d87910ebc8eca
Author: Sasha NÃcolas <sasha@xxxxxxxxxxx>
Date: 2017-09-08 (Fri, 08 Sep 2017)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/dwarfWalker.C
Log Message:
-----------
Merge pull request #403 from dyninst/sasha/fix-dwarf-symbol-frame
fix dwarf symbol frame
Commit: 0043eef0ede48bcc85ac8cb78db79941ebbf0dad
https://github.com/dyninst/dyninst/commit/0043eef0ede48bcc85ac8cb78db79941ebbf0dad
Author: Ray Chen <rchen@xxxxxxxxxx>
Date: 2017-09-12 (Tue, 12 Sep 2017)
Changed paths:
M instructionAPI/arm_manual_parser.py
M instructionAPI/src/InstructionDecoder-aarch32.C
M instructionAPI/src/aarch32_decoder_autogen.C
Log Message:
-----------
Add condition suffix to mnemonics.
Commit: d24fe0e316565634ed278e045da197a4d2cf8887
https://github.com/dyninst/dyninst/commit/d24fe0e316565634ed278e045da197a4d2cf8887
Author: Ray Chen <rchen@xxxxxxxxxx>
Date: 2017-09-12 (Tue, 12 Sep 2017)
Changed paths:
M instructionAPI/arm_manual_parser.py
M instructionAPI/src/aarch32_decoder_autogen.C
Log Message:
-----------
Move DEBUG_AARCH32_DECODE to cover bit_rep[].
Commit: 1cbf7885dd3ebfc5b72acb3ac293abd721b9088c
https://github.com/dyninst/dyninst/commit/1cbf7885dd3ebfc5b72acb3ac293abd721b9088c
Author: Ray Chen <rchen@xxxxxxxxxx>
Date: 2017-09-22 (Fri, 22 Sep 2017)
Changed paths:
M instructionAPI/arm_manual_parser.py
M instructionAPI/src/aarch32_decoder_autogen.C
Log Message:
-----------
Fix logic inversion for condition field test.
Commit: a865b74f66bd9b17f3a5becdc184d19dbb7483c8
https://github.com/dyninst/dyninst/commit/a865b74f66bd9b17f3a5becdc184d19dbb7483c8
Author: Ray Chen <rchen@xxxxxxxxxx>
Date: 2017-09-22 (Fri, 22 Sep 2017)
Changed paths:
M instructionAPI/arm_manual_parser.py
M instructionAPI/src/aarch32_decoder_autogen.C
Log Message:
-----------
Fix branch target calculation.
Add an 8-byte offset to the B and BL instruction's <label> operand to
account for PC pre-fetching.
Commit: 8feba979d1ee3129805f8282f591625c8dd5ba06
https://github.com/dyninst/dyninst/commit/8feba979d1ee3129805f8282f591625c8dd5ba06
Author: Ray Chen <rchen@xxxxxxxxxx>
Date: 2017-09-22 (Fri, 22 Sep 2017)
Changed paths:
M instructionAPI/src/InstructionDecoder-aarch32.C
Log Message:
-----------
Replace stack memory bug with memory leak.
Using a std::string::c_str() pointer after the destruction of its
instance is an error. For now, we "fix" this problem by allocating
heap memory. This should eventually be replaced by a static table.
Commit: fec1e18fb0b5ec6d14182db25d663339131a2b42
https://github.com/dyninst/dyninst/commit/fec1e18fb0b5ec6d14182db25d663339131a2b42
Author: Ray Chen <rchen@xxxxxxxxxx>
Date: 2017-09-24 (Sun, 24 Sep 2017)
Changed paths:
M .gitignore
R .idea/deployment.xml
R .idea/webServers.xml
M CHANGELOG.md
M CMakeLists.txt
M INSTALL
M appveyor.yml
M cmake/DyninstConfig.cmake.in
M cmake/Modules/FindLibDwarf.cmake
M cmake/packages.cmake
M cmake/shared.cmake
A common/docs/decoding_diagram.png
A common/docs/rose_structure.png
M common/h/Graph.h
M common/h/dyn_regs.h
M common/h/entryIDs.h
M common/src/Graph.C
M common/src/arch-x86.C
M common/src/arch-x86.h
M common/src/dyn_regs.C
M dataflowAPI/h/slicing.h
R dataflowAPI/rose/powerpcInstructionSemantics.h
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
A dataflowAPI/rose/semantics/DispatcherPowerpc.C
A dataflowAPI/rose/semantics/DispatcherPowerpc.h
M dataflowAPI/rose/semantics/MemoryMap.C
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/Registers.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/rose/util/Message.C
M dataflowAPI/rose/util/PoolAllocator.h
M dataflowAPI/src/AbslocInterface.C
M dataflowAPI/src/ExpressionConversionVisitor.C
M dataflowAPI/src/RoseImpl.C
M dataflowAPI/src/RoseInsnFactory.C
M dataflowAPI/src/SymEval.C
M dataflowAPI/src/SymbolicExpansion.C
M dataflowAPI/src/SymbolicExpansion.h
M dataflowAPI/src/convertOpcodes.C
M dataflowAPI/src/liveness.C
M dataflowAPI/src/slicing.C
M dataflowAPI/src/stackanalysis.C
M dwarf/CMakeLists.txt
M dwarf/h/dwarfExprParser.h
M dwarf/h/dwarfFrameParser.h
M dwarf/h/dwarfHandle.h
M dwarf/h/dwarfResult.h
M dwarf/src/dwarfExprParser.C
M dwarf/src/dwarfFrameParser.C
M dwarf/src/dwarfHandle.C
M dwarf/src/dwarfResult.C
M dynC_API/src/dynC.tab.C
R dyninstAPI/doc/dyninstAPI.doc
A dyninstAPI/doc/dyninstAPI.docx
M dyninstAPI/doc/dyninstAPI.pdf
M dyninstAPI/h/BPatch.h
M dyninstAPI/h/BPatch_type.h
M dyninstAPI/src/BPatch_function.C
M dyninstAPI/src/BPatch_type.C
M dyninstAPI/src/Parsing.C
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
M dyninstAPI/src/StackMod/StackAccess.C
M dyninstAPI/src/binaryEdit.h
M dyninstAPI/src/codegen-power.C
M dyninstAPI/src/dynProcess.C
M dyninstAPI/src/emit-x86.C
M dyninstAPI/src/image.C
M dyninstAPI/src/inst-x86.C
M dyninstAPI/src/pcEventHandler.C
M dyninstAPI/src/pcEventMuxer.C
M external/rose/powerpcInstructionEnum.h
M instructionAPI/CMakeLists.txt
A instructionAPI/ISA_ps/abs_advsimd
A instructionAPI/ISA_ps/adc
A instructionAPI/ISA_ps/adcs
A instructionAPI/ISA_ps/add_addsub_ext
A instructionAPI/ISA_ps/add_addsub_imm
A instructionAPI/ISA_ps/add_addsub_shift
A instructionAPI/ISA_ps/add_advsimd
A instructionAPI/ISA_ps/addhn_advsimd
A instructionAPI/ISA_ps/addp_advsimd_pair
A instructionAPI/ISA_ps/addp_advsimd_vec
A instructionAPI/ISA_ps/adds_addsub_ext
A instructionAPI/ISA_ps/adds_addsub_imm
A instructionAPI/ISA_ps/adds_addsub_shift
A instructionAPI/ISA_ps/addv_advsimd
A instructionAPI/ISA_ps/adr
A instructionAPI/ISA_ps/adrp
A instructionAPI/ISA_ps/aesd_advsimd
A instructionAPI/ISA_ps/aese_advsimd
A instructionAPI/ISA_ps/aesimc_advsimd
A instructionAPI/ISA_ps/aesmc_advsimd
A instructionAPI/ISA_ps/and_advsimd
A instructionAPI/ISA_ps/and_log_imm
A instructionAPI/ISA_ps/and_log_shift
A instructionAPI/ISA_ps/ands_log_imm
A instructionAPI/ISA_ps/ands_log_shift
A instructionAPI/ISA_ps/asr_asrv
A instructionAPI/ISA_ps/asr_sbfm
A instructionAPI/ISA_ps/asrv
A instructionAPI/ISA_ps/at_sys
A instructionAPI/ISA_ps/b_cond
A instructionAPI/ISA_ps/b_uncond
A instructionAPI/ISA_ps/bfi_bfm
A instructionAPI/ISA_ps/bfm
A instructionAPI/ISA_ps/bfxil_bfm
A instructionAPI/ISA_ps/bic_advsimd_imm
A instructionAPI/ISA_ps/bic_advsimd_reg
A instructionAPI/ISA_ps/bic_log_shift
A instructionAPI/ISA_ps/bics
A instructionAPI/ISA_ps/bif_advsimd
A instructionAPI/ISA_ps/bit_advsimd
A instructionAPI/ISA_ps/bl
A instructionAPI/ISA_ps/blr
A instructionAPI/ISA_ps/br
A instructionAPI/ISA_ps/brk
A instructionAPI/ISA_ps/bsl_advsimd
A instructionAPI/ISA_ps/cbnz
A instructionAPI/ISA_ps/cbz
A instructionAPI/ISA_ps/ccmn_imm
A instructionAPI/ISA_ps/ccmn_reg
A instructionAPI/ISA_ps/ccmp_imm
A instructionAPI/ISA_ps/ccmp_reg
A instructionAPI/ISA_ps/cinc_csinc
A instructionAPI/ISA_ps/cinv_csinv
A instructionAPI/ISA_ps/clrex
A instructionAPI/ISA_ps/cls_advsimd
A instructionAPI/ISA_ps/cls_int
A instructionAPI/ISA_ps/clz_advsimd
A instructionAPI/ISA_ps/clz_int
A instructionAPI/ISA_ps/cmeq_advsimd_reg
A instructionAPI/ISA_ps/cmeq_advsimd_zero
A instructionAPI/ISA_ps/cmge_advsimd_reg
A instructionAPI/ISA_ps/cmge_advsimd_zero
A instructionAPI/ISA_ps/cmgt_advsimd_reg
A instructionAPI/ISA_ps/cmgt_advsimd_zero
A instructionAPI/ISA_ps/cmhi_advsimd
A instructionAPI/ISA_ps/cmhs_advsimd
A instructionAPI/ISA_ps/cmle_advsimd
A instructionAPI/ISA_ps/cmlt_advsimd
A instructionAPI/ISA_ps/cmn_adds_addsub_ext
A instructionAPI/ISA_ps/cmn_adds_addsub_imm
A instructionAPI/ISA_ps/cmn_adds_addsub_shift
A instructionAPI/ISA_ps/cmp_subs_addsub_ext
A instructionAPI/ISA_ps/cmp_subs_addsub_imm
A instructionAPI/ISA_ps/cmp_subs_addsub_shift
A instructionAPI/ISA_ps/cmtst_advsimd
A instructionAPI/ISA_ps/cneg_csneg
A instructionAPI/ISA_ps/cnt_advsimd
A instructionAPI/ISA_ps/crc32
A instructionAPI/ISA_ps/crc32c
A instructionAPI/ISA_ps/csel
A instructionAPI/ISA_ps/cset_csinc
A instructionAPI/ISA_ps/csetm_csinv
A instructionAPI/ISA_ps/csinc
A instructionAPI/ISA_ps/csinv
A instructionAPI/ISA_ps/csneg
A instructionAPI/ISA_ps/dc_sys
A instructionAPI/ISA_ps/dcps1
A instructionAPI/ISA_ps/dcps2
A instructionAPI/ISA_ps/dcps3
A instructionAPI/ISA_ps/dmb
A instructionAPI/ISA_ps/drps
A instructionAPI/ISA_ps/dsb
A instructionAPI/ISA_ps/dup_advsimd_elt
A instructionAPI/ISA_ps/dup_advsimd_gen
A instructionAPI/ISA_ps/encodingindex
A instructionAPI/ISA_ps/enumerated-symbol-accounts
A instructionAPI/ISA_ps/eon
A instructionAPI/ISA_ps/eor_advsimd
A instructionAPI/ISA_ps/eor_log_imm
A instructionAPI/ISA_ps/eor_log_shift
A instructionAPI/ISA_ps/eret
A instructionAPI/ISA_ps/ext_advsimd
A instructionAPI/ISA_ps/extr
A instructionAPI/ISA_ps/fabd_advsimd
A instructionAPI/ISA_ps/fabs_advsimd
A instructionAPI/ISA_ps/fabs_float
A instructionAPI/ISA_ps/facge_advsimd
A instructionAPI/ISA_ps/facgt_advsimd
A instructionAPI/ISA_ps/fadd_advsimd
A instructionAPI/ISA_ps/fadd_float
A instructionAPI/ISA_ps/faddp_advsimd_pair
A instructionAPI/ISA_ps/faddp_advsimd_vec
A instructionAPI/ISA_ps/fccmp_float
A instructionAPI/ISA_ps/fccmpe_float
A instructionAPI/ISA_ps/fcmeq_advsimd_reg
A instructionAPI/ISA_ps/fcmeq_advsimd_zero
A instructionAPI/ISA_ps/fcmge_advsimd_reg
A instructionAPI/ISA_ps/fcmge_advsimd_zero
A instructionAPI/ISA_ps/fcmgt_advsimd_reg
A instructionAPI/ISA_ps/fcmgt_advsimd_zero
A instructionAPI/ISA_ps/fcmle_advsimd
A instructionAPI/ISA_ps/fcmlt_advsimd
A instructionAPI/ISA_ps/fcmp_float
A instructionAPI/ISA_ps/fcmpe_float
A instructionAPI/ISA_ps/fcsel_float
A instructionAPI/ISA_ps/fcvt_float
A instructionAPI/ISA_ps/fcvtas_advsimd
A instructionAPI/ISA_ps/fcvtas_float
A instructionAPI/ISA_ps/fcvtau_advsimd
A instructionAPI/ISA_ps/fcvtau_float
A instructionAPI/ISA_ps/fcvtl_advsimd
A instructionAPI/ISA_ps/fcvtms_advsimd
A instructionAPI/ISA_ps/fcvtms_float
A instructionAPI/ISA_ps/fcvtmu_advsimd
A instructionAPI/ISA_ps/fcvtmu_float
A instructionAPI/ISA_ps/fcvtn_advsimd
A instructionAPI/ISA_ps/fcvtns_advsimd
A instructionAPI/ISA_ps/fcvtns_float
A instructionAPI/ISA_ps/fcvtnu_advsimd
A instructionAPI/ISA_ps/fcvtnu_float
A instructionAPI/ISA_ps/fcvtps_advsimd
A instructionAPI/ISA_ps/fcvtps_float
A instructionAPI/ISA_ps/fcvtpu_advsimd
A instructionAPI/ISA_ps/fcvtpu_float
A instructionAPI/ISA_ps/fcvtxn_advsimd
A instructionAPI/ISA_ps/fcvtzs_advsimd_fix
A instructionAPI/ISA_ps/fcvtzs_advsimd_int
A instructionAPI/ISA_ps/fcvtzs_float_fix
A instructionAPI/ISA_ps/fcvtzs_float_int
A instructionAPI/ISA_ps/fcvtzu_advsimd_fix
A instructionAPI/ISA_ps/fcvtzu_advsimd_int
A instructionAPI/ISA_ps/fcvtzu_float_fix
A instructionAPI/ISA_ps/fcvtzu_float_int
A instructionAPI/ISA_ps/fdiv_advsimd
A instructionAPI/ISA_ps/fdiv_float
A instructionAPI/ISA_ps/fmadd_float
A instructionAPI/ISA_ps/fmax_advsimd
A instructionAPI/ISA_ps/fmax_float
A instructionAPI/ISA_ps/fmaxnm_advsimd
A instructionAPI/ISA_ps/fmaxnm_float
A instructionAPI/ISA_ps/fmaxnmp_advsimd_pair
A instructionAPI/ISA_ps/fmaxnmp_advsimd_vec
A instructionAPI/ISA_ps/fmaxnmv_advsimd
A instructionAPI/ISA_ps/fmaxp_advsimd_pair
A instructionAPI/ISA_ps/fmaxp_advsimd_vec
A instructionAPI/ISA_ps/fmaxv_advsimd
A instructionAPI/ISA_ps/fmin_advsimd
A instructionAPI/ISA_ps/fmin_float
A instructionAPI/ISA_ps/fminnm_advsimd
A instructionAPI/ISA_ps/fminnm_float
A instructionAPI/ISA_ps/fminnmp_advsimd_pair
A instructionAPI/ISA_ps/fminnmp_advsimd_vec
A instructionAPI/ISA_ps/fminnmv_advsimd
A instructionAPI/ISA_ps/fminp_advsimd_pair
A instructionAPI/ISA_ps/fminp_advsimd_vec
A instructionAPI/ISA_ps/fminv_advsimd
A instructionAPI/ISA_ps/fmla_advsimd_elt
A instructionAPI/ISA_ps/fmla_advsimd_vec
A instructionAPI/ISA_ps/fmls_advsimd_elt
A instructionAPI/ISA_ps/fmls_advsimd_vec
A instructionAPI/ISA_ps/fmov_advsimd
A instructionAPI/ISA_ps/fmov_float
A instructionAPI/ISA_ps/fmov_float_gen
A instructionAPI/ISA_ps/fmov_float_imm
A instructionAPI/ISA_ps/fmsub_float
A instructionAPI/ISA_ps/fmul_advsimd_elt
A instructionAPI/ISA_ps/fmul_advsimd_vec
A instructionAPI/ISA_ps/fmul_float
A instructionAPI/ISA_ps/fmulx_advsimd_elt
A instructionAPI/ISA_ps/fmulx_advsimd_vec
A instructionAPI/ISA_ps/fneg_advsimd
A instructionAPI/ISA_ps/fneg_float
A instructionAPI/ISA_ps/fnmadd_float
A instructionAPI/ISA_ps/fnmsub_float
A instructionAPI/ISA_ps/fnmul_float
A instructionAPI/ISA_ps/fpsimdindex
A instructionAPI/ISA_ps/frecpe_advsimd
A instructionAPI/ISA_ps/frecps_advsimd
A instructionAPI/ISA_ps/frecpx_advsimd
A instructionAPI/ISA_ps/frinta_advsimd
A instructionAPI/ISA_ps/frinta_float
A instructionAPI/ISA_ps/frinti_advsimd
A instructionAPI/ISA_ps/frinti_float
A instructionAPI/ISA_ps/frintm_advsimd
A instructionAPI/ISA_ps/frintm_float
A instructionAPI/ISA_ps/frintn_advsimd
A instructionAPI/ISA_ps/frintn_float
A instructionAPI/ISA_ps/frintp_advsimd
A instructionAPI/ISA_ps/frintp_float
A instructionAPI/ISA_ps/frintx_advsimd
A instructionAPI/ISA_ps/frintx_float
A instructionAPI/ISA_ps/frintz_advsimd
A instructionAPI/ISA_ps/frintz_float
A instructionAPI/ISA_ps/frsqrte_advsimd
A instructionAPI/ISA_ps/frsqrts_advsimd
A instructionAPI/ISA_ps/fsqrt_advsimd
A instructionAPI/ISA_ps/fsqrt_float
A instructionAPI/ISA_ps/fsub_advsimd
A instructionAPI/ISA_ps/fsub_float
A instructionAPI/ISA_ps/hint
A instructionAPI/ISA_ps/hlt
A instructionAPI/ISA_ps/hvc
A instructionAPI/ISA_ps/ic_sys
A instructionAPI/ISA_ps/index
A instructionAPI/ISA_ps/ins_advsimd_elt
A instructionAPI/ISA_ps/ins_advsimd_gen
A instructionAPI/ISA_ps/isb
A instructionAPI/ISA_ps/ld1_advsimd_mult
A instructionAPI/ISA_ps/ld1_advsimd_sngl
A instructionAPI/ISA_ps/ld1r_advsimd
A instructionAPI/ISA_ps/ld2_advsimd_mult
A instructionAPI/ISA_ps/ld2_advsimd_sngl
A instructionAPI/ISA_ps/ld2r_advsimd
A instructionAPI/ISA_ps/ld3_advsimd_mult
A instructionAPI/ISA_ps/ld3_advsimd_sngl
A instructionAPI/ISA_ps/ld3r_advsimd
A instructionAPI/ISA_ps/ld4_advsimd_mult
A instructionAPI/ISA_ps/ld4_advsimd_sngl
A instructionAPI/ISA_ps/ld4r_advsimd
A instructionAPI/ISA_ps/ldar
A instructionAPI/ISA_ps/ldarb
A instructionAPI/ISA_ps/ldarh
A instructionAPI/ISA_ps/ldaxp
A instructionAPI/ISA_ps/ldaxr
A instructionAPI/ISA_ps/ldaxrb
A instructionAPI/ISA_ps/ldaxrh
A instructionAPI/ISA_ps/ldnp_fpsimd
A instructionAPI/ISA_ps/ldnp_gen
A instructionAPI/ISA_ps/ldp_fpsimd
A instructionAPI/ISA_ps/ldp_gen
A instructionAPI/ISA_ps/ldpsw
A instructionAPI/ISA_ps/ldr_imm_fpsimd
A instructionAPI/ISA_ps/ldr_imm_gen
A instructionAPI/ISA_ps/ldr_lit_fpsimd
A instructionAPI/ISA_ps/ldr_lit_gen
A instructionAPI/ISA_ps/ldr_reg_fpsimd
A instructionAPI/ISA_ps/ldr_reg_gen
A instructionAPI/ISA_ps/ldrb_imm
A instructionAPI/ISA_ps/ldrb_reg
A instructionAPI/ISA_ps/ldrh_imm
A instructionAPI/ISA_ps/ldrh_reg
A instructionAPI/ISA_ps/ldrsb_imm
A instructionAPI/ISA_ps/ldrsb_reg
A instructionAPI/ISA_ps/ldrsh_imm
A instructionAPI/ISA_ps/ldrsh_reg
A instructionAPI/ISA_ps/ldrsw_imm
A instructionAPI/ISA_ps/ldrsw_lit
A instructionAPI/ISA_ps/ldrsw_reg
A instructionAPI/ISA_ps/ldtr
A instructionAPI/ISA_ps/ldtrb
A instructionAPI/ISA_ps/ldtrh
A instructionAPI/ISA_ps/ldtrsb
A instructionAPI/ISA_ps/ldtrsh
A instructionAPI/ISA_ps/ldtrsw
A instructionAPI/ISA_ps/ldur_fpsimd
A instructionAPI/ISA_ps/ldur_gen
A instructionAPI/ISA_ps/ldurb
A instructionAPI/ISA_ps/ldurh
A instructionAPI/ISA_ps/ldursb
A instructionAPI/ISA_ps/ldursh
A instructionAPI/ISA_ps/ldursw
A instructionAPI/ISA_ps/ldxp
A instructionAPI/ISA_ps/ldxr
A instructionAPI/ISA_ps/ldxrb
A instructionAPI/ISA_ps/ldxrh
A instructionAPI/ISA_ps/lsl_lslv
A instructionAPI/ISA_ps/lsl_ubfm
A instructionAPI/ISA_ps/lslv
A instructionAPI/ISA_ps/lsr_lsrv
A instructionAPI/ISA_ps/lsr_ubfm
A instructionAPI/ISA_ps/lsrv
A instructionAPI/ISA_ps/madd
A instructionAPI/ISA_ps/mla_advsimd_elt
A instructionAPI/ISA_ps/mla_advsimd_vec
A instructionAPI/ISA_ps/mls_advsimd_elt
A instructionAPI/ISA_ps/mls_advsimd_vec
A instructionAPI/ISA_ps/mneg_msub
A instructionAPI/ISA_ps/mov_add_addsub_imm
A instructionAPI/ISA_ps/mov_dup_advsimd_elt
A instructionAPI/ISA_ps/mov_ins_advsimd_elt
A instructionAPI/ISA_ps/mov_ins_advsimd_gen
A instructionAPI/ISA_ps/mov_movn
A instructionAPI/ISA_ps/mov_movz
A instructionAPI/ISA_ps/mov_orr_advsimd_reg
A instructionAPI/ISA_ps/mov_orr_log_imm
A instructionAPI/ISA_ps/mov_orr_log_shift
A instructionAPI/ISA_ps/mov_umov_advsimd
A instructionAPI/ISA_ps/movi_advsimd
A instructionAPI/ISA_ps/movk
A instructionAPI/ISA_ps/movn
A instructionAPI/ISA_ps/movz
A instructionAPI/ISA_ps/mrs
A instructionAPI/ISA_ps/msr_imm
A instructionAPI/ISA_ps/msr_reg
A instructionAPI/ISA_ps/msub
A instructionAPI/ISA_ps/mul_advsimd_elt
A instructionAPI/ISA_ps/mul_advsimd_vec
A instructionAPI/ISA_ps/mul_madd
A instructionAPI/ISA_ps/mvn_not_advsimd
A instructionAPI/ISA_ps/mvn_orn_log_shift
A instructionAPI/ISA_ps/mvni_advsimd
A instructionAPI/ISA_ps/neg_advsimd
A instructionAPI/ISA_ps/neg_sub_addsub_shift
A instructionAPI/ISA_ps/negs_subs_addsub_shift
A instructionAPI/ISA_ps/ngc_sbc
A instructionAPI/ISA_ps/ngcs_sbcs
A instructionAPI/ISA_ps/nop_hint
A instructionAPI/ISA_ps/not_advsimd
A instructionAPI/ISA_ps/orn_advsimd
A instructionAPI/ISA_ps/orn_log_shift
A instructionAPI/ISA_ps/orr_advsimd_imm
A instructionAPI/ISA_ps/orr_advsimd_reg
A instructionAPI/ISA_ps/orr_log_imm
A instructionAPI/ISA_ps/orr_log_shift
A instructionAPI/ISA_ps/permindex
A instructionAPI/ISA_ps/pmul_advsimd
A instructionAPI/ISA_ps/pmull_advsimd
A instructionAPI/ISA_ps/prfm_imm
A instructionAPI/ISA_ps/prfm_lit
A instructionAPI/ISA_ps/prfm_reg
A instructionAPI/ISA_ps/prfum
A instructionAPI/ISA_ps/raddhn_advsimd
A instructionAPI/ISA_ps/rbit_advsimd
A instructionAPI/ISA_ps/rbit_int
A instructionAPI/ISA_ps/ret
A instructionAPI/ISA_ps/rev
A instructionAPI/ISA_ps/rev16_advsimd
A instructionAPI/ISA_ps/rev16_int
A instructionAPI/ISA_ps/rev32_advsimd
A instructionAPI/ISA_ps/rev32_int
A instructionAPI/ISA_ps/rev64_advsimd
A instructionAPI/ISA_ps/ror_extr
A instructionAPI/ISA_ps/ror_rorv
A instructionAPI/ISA_ps/rorv
A instructionAPI/ISA_ps/rshrn_advsimd
A instructionAPI/ISA_ps/rsubhn_advsimd
A instructionAPI/ISA_ps/saba_advsimd
A instructionAPI/ISA_ps/sabal_advsimd
A instructionAPI/ISA_ps/sabd_advsimd
A instructionAPI/ISA_ps/sabdl_advsimd
A instructionAPI/ISA_ps/sadalp_advsimd
A instructionAPI/ISA_ps/saddl_advsimd
A instructionAPI/ISA_ps/saddlp_advsimd
A instructionAPI/ISA_ps/saddlv_advsimd
A instructionAPI/ISA_ps/saddw_advsimd
A instructionAPI/ISA_ps/sbc
A instructionAPI/ISA_ps/sbcs
A instructionAPI/ISA_ps/sbfiz_sbfm
A instructionAPI/ISA_ps/sbfm
A instructionAPI/ISA_ps/sbfx_sbfm
A instructionAPI/ISA_ps/scvtf_advsimd_fix
A instructionAPI/ISA_ps/scvtf_advsimd_int
A instructionAPI/ISA_ps/scvtf_float_fix
A instructionAPI/ISA_ps/scvtf_float_int
A instructionAPI/ISA_ps/sdiv
A instructionAPI/ISA_ps/sev_hint
A instructionAPI/ISA_ps/sevl_hint
A instructionAPI/ISA_ps/sha1c_advsimd
A instructionAPI/ISA_ps/sha1h_advsimd
A instructionAPI/ISA_ps/sha1m_advsimd
A instructionAPI/ISA_ps/sha1p_advsimd
A instructionAPI/ISA_ps/sha1su0_advsimd
A instructionAPI/ISA_ps/sha1su1_advsimd
A instructionAPI/ISA_ps/sha256h2_advsimd
A instructionAPI/ISA_ps/sha256h_advsimd
A instructionAPI/ISA_ps/sha256su0_advsimd
A instructionAPI/ISA_ps/sha256su1_advsimd
A instructionAPI/ISA_ps/shadd_advsimd
A instructionAPI/ISA_ps/shared_pseudocode
A instructionAPI/ISA_ps/shl_advsimd
A instructionAPI/ISA_ps/shll_advsimd
A instructionAPI/ISA_ps/shrn_advsimd
A instructionAPI/ISA_ps/shsub_advsimd
A instructionAPI/ISA_ps/sli_advsimd
A instructionAPI/ISA_ps/smaddl
A instructionAPI/ISA_ps/smax_advsimd
A instructionAPI/ISA_ps/smaxp_advsimd
A instructionAPI/ISA_ps/smaxv_advsimd
A instructionAPI/ISA_ps/smc
A instructionAPI/ISA_ps/smin_advsimd
A instructionAPI/ISA_ps/sminp_advsimd
A instructionAPI/ISA_ps/sminv_advsimd
A instructionAPI/ISA_ps/smlal_advsimd_elt
A instructionAPI/ISA_ps/smlal_advsimd_vec
A instructionAPI/ISA_ps/smlsl_advsimd_elt
A instructionAPI/ISA_ps/smlsl_advsimd_vec
A instructionAPI/ISA_ps/smnegl_smsubl
A instructionAPI/ISA_ps/smov_advsimd
A instructionAPI/ISA_ps/smsubl
A instructionAPI/ISA_ps/smulh
A instructionAPI/ISA_ps/smull_advsimd_elt
A instructionAPI/ISA_ps/smull_advsimd_vec
A instructionAPI/ISA_ps/smull_smaddl
A instructionAPI/ISA_ps/sqabs_advsimd
A instructionAPI/ISA_ps/sqadd_advsimd
A instructionAPI/ISA_ps/sqdmlal_advsimd_elt
A instructionAPI/ISA_ps/sqdmlal_advsimd_vec
A instructionAPI/ISA_ps/sqdmlsl_advsimd_elt
A instructionAPI/ISA_ps/sqdmlsl_advsimd_vec
A instructionAPI/ISA_ps/sqdmulh_advsimd_elt
A instructionAPI/ISA_ps/sqdmulh_advsimd_vec
A instructionAPI/ISA_ps/sqdmull_advsimd_elt
A instructionAPI/ISA_ps/sqdmull_advsimd_vec
A instructionAPI/ISA_ps/sqneg_advsimd
A instructionAPI/ISA_ps/sqrdmulh_advsimd_elt
A instructionAPI/ISA_ps/sqrdmulh_advsimd_vec
A instructionAPI/ISA_ps/sqrshl_advsimd
A instructionAPI/ISA_ps/sqrshrn_advsimd
A instructionAPI/ISA_ps/sqrshrun_advsimd
A instructionAPI/ISA_ps/sqshl_advsimd_imm
A instructionAPI/ISA_ps/sqshl_advsimd_reg
A instructionAPI/ISA_ps/sqshlu_advsimd
A instructionAPI/ISA_ps/sqshrn_advsimd
A instructionAPI/ISA_ps/sqshrun_advsimd
A instructionAPI/ISA_ps/sqsub_advsimd
A instructionAPI/ISA_ps/sqxtn_advsimd
A instructionAPI/ISA_ps/sqxtun_advsimd
A instructionAPI/ISA_ps/srhadd_advsimd
A instructionAPI/ISA_ps/sri_advsimd
A instructionAPI/ISA_ps/srshl_advsimd
A instructionAPI/ISA_ps/srshr_advsimd
A instructionAPI/ISA_ps/srsra_advsimd
A instructionAPI/ISA_ps/sshl_advsimd
A instructionAPI/ISA_ps/sshll_advsimd
A instructionAPI/ISA_ps/sshr_advsimd
A instructionAPI/ISA_ps/ssra_advsimd
A instructionAPI/ISA_ps/ssubl_advsimd
A instructionAPI/ISA_ps/ssubw_advsimd
A instructionAPI/ISA_ps/st1_advsimd_mult
A instructionAPI/ISA_ps/st1_advsimd_sngl
A instructionAPI/ISA_ps/st2_advsimd_mult
A instructionAPI/ISA_ps/st2_advsimd_sngl
A instructionAPI/ISA_ps/st3_advsimd_mult
A instructionAPI/ISA_ps/st3_advsimd_sngl
A instructionAPI/ISA_ps/st4_advsimd_mult
A instructionAPI/ISA_ps/st4_advsimd_sngl
A instructionAPI/ISA_ps/stlr
A instructionAPI/ISA_ps/stlrb
A instructionAPI/ISA_ps/stlrh
A instructionAPI/ISA_ps/stlxp
A instructionAPI/ISA_ps/stlxr
A instructionAPI/ISA_ps/stlxrb
A instructionAPI/ISA_ps/stlxrh
A instructionAPI/ISA_ps/stnp_fpsimd
A instructionAPI/ISA_ps/stnp_gen
A instructionAPI/ISA_ps/stp_fpsimd
A instructionAPI/ISA_ps/stp_gen
A instructionAPI/ISA_ps/str_imm_fpsimd
A instructionAPI/ISA_ps/str_imm_gen
A instructionAPI/ISA_ps/str_reg_fpsimd
A instructionAPI/ISA_ps/str_reg_gen
A instructionAPI/ISA_ps/strb_imm
A instructionAPI/ISA_ps/strb_reg
A instructionAPI/ISA_ps/strh_imm
A instructionAPI/ISA_ps/strh_reg
A instructionAPI/ISA_ps/sttr
A instructionAPI/ISA_ps/sttrb
A instructionAPI/ISA_ps/sttrh
A instructionAPI/ISA_ps/stur_fpsimd
A instructionAPI/ISA_ps/stur_gen
A instructionAPI/ISA_ps/sturb
A instructionAPI/ISA_ps/sturh
A instructionAPI/ISA_ps/stxp
A instructionAPI/ISA_ps/stxr
A instructionAPI/ISA_ps/stxrb
A instructionAPI/ISA_ps/stxrh
A instructionAPI/ISA_ps/sub_addsub_ext
A instructionAPI/ISA_ps/sub_addsub_imm
A instructionAPI/ISA_ps/sub_addsub_shift
A instructionAPI/ISA_ps/sub_advsimd
A instructionAPI/ISA_ps/subhn_advsimd
A instructionAPI/ISA_ps/subs_addsub_ext
A instructionAPI/ISA_ps/subs_addsub_imm
A instructionAPI/ISA_ps/subs_addsub_shift
A instructionAPI/ISA_ps/suqadd_advsimd
A instructionAPI/ISA_ps/svc
A instructionAPI/ISA_ps/sxtb_sbfm
A instructionAPI/ISA_ps/sxth_sbfm
A instructionAPI/ISA_ps/sxtl_sshll_advsimd
A instructionAPI/ISA_ps/sxtw_sbfm
A instructionAPI/ISA_ps/sys
A instructionAPI/ISA_ps/sysl
A instructionAPI/ISA_ps/tbl_advsimd
A instructionAPI/ISA_ps/tbnz
A instructionAPI/ISA_ps/tbx_advsimd
A instructionAPI/ISA_ps/tbz
A instructionAPI/ISA_ps/temp.py
A instructionAPI/ISA_ps/tlbi_sys
A instructionAPI/ISA_ps/trn1_advsimd
A instructionAPI/ISA_ps/trn2_advsimd
A instructionAPI/ISA_ps/tst_ands_log_imm
A instructionAPI/ISA_ps/tst_ands_log_shift
A instructionAPI/ISA_ps/uaba_advsimd
A instructionAPI/ISA_ps/uabal_advsimd
A instructionAPI/ISA_ps/uabd_advsimd
A instructionAPI/ISA_ps/uabdl_advsimd
A instructionAPI/ISA_ps/uadalp_advsimd
A instructionAPI/ISA_ps/uaddl_advsimd
A instructionAPI/ISA_ps/uaddlp_advsimd
A instructionAPI/ISA_ps/uaddlv_advsimd
A instructionAPI/ISA_ps/uaddw_advsimd
A instructionAPI/ISA_ps/ubfiz_ubfm
A instructionAPI/ISA_ps/ubfm
A instructionAPI/ISA_ps/ubfx_ubfm
A instructionAPI/ISA_ps/ucvtf_advsimd_fix
A instructionAPI/ISA_ps/ucvtf_advsimd_int
A instructionAPI/ISA_ps/ucvtf_float_fix
A instructionAPI/ISA_ps/ucvtf_float_int
A instructionAPI/ISA_ps/udiv
A instructionAPI/ISA_ps/uhadd_advsimd
A instructionAPI/ISA_ps/uhsub_advsimd
A instructionAPI/ISA_ps/umaddl
A instructionAPI/ISA_ps/umax_advsimd
A instructionAPI/ISA_ps/umaxp_advsimd
A instructionAPI/ISA_ps/umaxv_advsimd
A instructionAPI/ISA_ps/umin_advsimd
A instructionAPI/ISA_ps/uminp_advsimd
A instructionAPI/ISA_ps/uminv_advsimd
A instructionAPI/ISA_ps/umlal_advsimd_elt
A instructionAPI/ISA_ps/umlal_advsimd_vec
A instructionAPI/ISA_ps/umlsl_advsimd_elt
A instructionAPI/ISA_ps/umlsl_advsimd_vec
A instructionAPI/ISA_ps/umnegl_umsubl
A instructionAPI/ISA_ps/umov_advsimd
A instructionAPI/ISA_ps/umsubl
A instructionAPI/ISA_ps/umulh
A instructionAPI/ISA_ps/umull_advsimd_elt
A instructionAPI/ISA_ps/umull_advsimd_vec
A instructionAPI/ISA_ps/umull_umaddl
A instructionAPI/ISA_ps/uqadd_advsimd
A instructionAPI/ISA_ps/uqrshl_advsimd
A instructionAPI/ISA_ps/uqrshrn_advsimd
A instructionAPI/ISA_ps/uqshl_advsimd_imm
A instructionAPI/ISA_ps/uqshl_advsimd_reg
A instructionAPI/ISA_ps/uqshrn_advsimd
A instructionAPI/ISA_ps/uqsub_advsimd
A instructionAPI/ISA_ps/uqxtn_advsimd
A instructionAPI/ISA_ps/urecpe_advsimd
A instructionAPI/ISA_ps/urhadd_advsimd
A instructionAPI/ISA_ps/urshl_advsimd
A instructionAPI/ISA_ps/urshr_advsimd
A instructionAPI/ISA_ps/ursqrte_advsimd
A instructionAPI/ISA_ps/ursra_advsimd
A instructionAPI/ISA_ps/ushl_advsimd
A instructionAPI/ISA_ps/ushll_advsimd
A instructionAPI/ISA_ps/ushr_advsimd
A instructionAPI/ISA_ps/usqadd_advsimd
A instructionAPI/ISA_ps/usra_advsimd
A instructionAPI/ISA_ps/usubl_advsimd
A instructionAPI/ISA_ps/usubw_advsimd
A instructionAPI/ISA_ps/uxtb_ubfm
A instructionAPI/ISA_ps/uxth_ubfm
A instructionAPI/ISA_ps/uxtl_ushll_advsimd
A instructionAPI/ISA_ps/uzp1_advsimd
A instructionAPI/ISA_ps/uzp2_advsimd
A instructionAPI/ISA_ps/wfe_hint
A instructionAPI/ISA_ps/wfi_hint
A instructionAPI/ISA_ps/xtn_advsimd
A instructionAPI/ISA_ps/yield_hint
A instructionAPI/ISA_ps/zip1_advsimd
A instructionAPI/ISA_ps/zip2_advsimd
A instructionAPI/aarch64_pseudocode_extractor.py
M instructionAPI/doc/API/Instruction.tex
A instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/h/BinaryFunction.h
M instructionAPI/h/Dereference.h
M instructionAPI/h/Expression.h
M instructionAPI/h/Immediate.h
M instructionAPI/h/Instruction.h
M instructionAPI/h/InstructionAST.h
M instructionAPI/h/Operand.h
M instructionAPI/h/Register.h
M instructionAPI/h/Result.h
M instructionAPI/h/Visitor.h
A instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/Immediate.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/InstructionDecoder-aarch64.h
M instructionAPI/src/InstructionDecoder-power.C
M instructionAPI/src/InstructionDecoder-power.h
M instructionAPI/src/InstructionDecoder-x86.C
M instructionAPI/src/InstructionDecoder-x86.h
M instructionAPI/src/Operand.C
M instructionAPI/src/Register.C
M instructionAPI/src/aarch64_opcode_tables.C
M instructionAPI/src/power_opcode_tables.C
M parseAPI/CMakeLists.txt
M parseAPI/h/CodeObject.h
M parseAPI/h/CodeSource.h
M parseAPI/src/Block.C
M parseAPI/src/BoundFactCalculator.C
M parseAPI/src/BoundFactCalculator.h
M parseAPI/src/BoundFactData.C
M parseAPI/src/BoundFactData.h
M parseAPI/src/CodeObject.C
M parseAPI/src/CodeSource.C
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_IAPI.h
M parseAPI/src/IA_InstrucIter.C
M parseAPI/src/IA_aarch32.C
A parseAPI/src/IA_aarch32.h
R parseAPI/src/IA_aarch32Details.C
R parseAPI/src/IA_aarch32Details.h
M parseAPI/src/IA_aarch64.C
A parseAPI/src/IA_aarch64.h
R parseAPI/src/IA_aarch64Details.C
R parseAPI/src/IA_aarch64Details.h
R parseAPI/src/IA_platformDetails.h
R parseAPI/src/IA_platformDetailsFactory.C
M parseAPI/src/IA_power.C
M parseAPI/src/IA_power.h
R parseAPI/src/IA_powerDetails.C
R parseAPI/src/IA_powerDetails.h
M parseAPI/src/IA_x86.C
A parseAPI/src/IA_x86.h
R parseAPI/src/IA_x86Details.C
R parseAPI/src/IA_x86Details.h
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectASTVisitor.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/IndirectAnalyzer.h
R parseAPI/src/InstructionSource-aarch64.C
R parseAPI/src/InstructionSource-power.C
R parseAPI/src/InstructionSource-x86.C
A parseAPI/src/JumpTableFormatPred.C
A parseAPI/src/JumpTableFormatPred.h
A parseAPI/src/JumpTableIndexPred.C
A parseAPI/src/JumpTableIndexPred.h
R parseAPI/src/JumpTablePred.C
R parseAPI/src/JumpTablePred.h
M parseAPI/src/ParseData.C
M parseAPI/src/ParseData.h
M parseAPI/src/Parser-speculative.C
M parseAPI/src/Parser.C
M parseAPI/src/Parser.h
M parseAPI/src/ParserDetails.C
M parseAPI/src/ParserDetails.h
A parseAPI/src/SymbolicExpression.C
A parseAPI/src/SymbolicExpression.h
M parseAPI/src/SymtabCodeSource.C
M patchAPI/src/PatchMgr.C
M proccontrol/src/process.C
M stackwalk/h/walker.h
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/dbgstepper-impl.h
M symtabAPI/doc/A-Appendix.tex
M symtabAPI/h/Function.h
M symtabAPI/h/Module.h
M symtabAPI/h/Symtab.h
M symtabAPI/src/Function.C
M symtabAPI/src/LineInformation.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object-nt.C
M symtabAPI/src/Object-nt.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/Type.C
M symtabAPI/src/Variable.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElf.h
M symtabAPI/src/parseDwarf.C
Log Message:
-----------
Bring this feature branch up to date with master.
Merge remote-tracking branch 'upstream/master' into aarch32/dev/dunlop
Commit: f7957cc3e9e9436929ec332667b7aa42a7c08e60
https://github.com/dyninst/dyninst/commit/f7957cc3e9e9436929ec332667b7aa42a7c08e60
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-10-12 (Thu, 12 Oct 2017)
Changed paths:
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
Log Message:
-----------
Take the fix for the memory issue in dwarf parsing from the new-parallel-parsing branch
Commit: eae52d8a539b0081095721a47252055f89c4b0e4
https://github.com/dyninst/dyninst/commit/eae52d8a539b0081095721a47252055f89c4b0e4
Author: Xiaozhu Meng <xmeng@xxxxxxxxxxx>
Date: 2017-10-12 (Thu, 12 Oct 2017)
Changed paths:
M dyninstAPI/src/dynProcess.C
M symtabAPI/src/Object-elf.C
Log Message:
-----------
1. Should return from detaching the mutatee, when the mutatee cannot be stopped.
2. Pick Bill's strrchr usage fix
Commit: a3a027178c1dc935295f3b412d4f7039d11bdf9c
https://github.com/dyninst/dyninst/commit/a3a027178c1dc935295f3b412d4f7039d11bdf9c
Author: Stan Cox <scox@xxxxxxxxxx>
Date: 2017-10-20 (Fri, 20 Oct 2017)
Changed paths:
M common/src/addrtranslate-sysv.C
Log Message:
-----------
Add linux-vdso64.so.1 to the library blacklist.
Ignore linux-vdso64.so.1, which is the vdso variant on some ppc64 linux.
Commit: 2e2579153cfd50ec650e41972d88f4c9210ff010
https://github.com/dyninst/dyninst/commit/2e2579153cfd50ec650e41972d88f4c9210ff010
Author: Bill Williams <wwilliam47@xxxxxxxxx>
Date: 2017-11-08 (Wed, 08 Nov 2017)
Changed paths:
M common/src/addrtranslate-sysv.C
Log Message:
-----------
Merge pull request #414 from stanfordcox/vdso
Add linux-vdso64.so.1 to the library blacklist.
Commit: 323eb1ac0299cd1f9e22b04b1ea256158475be58
https://github.com/dyninst/dyninst/commit/323eb1ac0299cd1f9e22b04b1ea256158475be58
Author: Ray Chen <rchen@xxxxxxxxxx>
Date: 2017-11-13 (Mon, 13 Nov 2017)
Changed paths:
M common/src/addrtranslate-sysv.C
M dyninstAPI/src/dynProcess.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
Log Message:
-----------
Merge remote-tracking branch 'upstream/master' into dev/aarch32/dunlop
Commit: b562b26ec7354cdc0c683ca9733f837b3c1ab112
https://github.com/dyninst/dyninst/commit/b562b26ec7354cdc0c683ca9733f837b3c1ab112
Author: Ray Chen <rchyena@xxxxxxxxxxxxxxxxxxxxxxxx>
Date: 2017-11-13 (Mon, 13 Nov 2017)
Changed paths:
M .gitignore
R .idea/deployment.xml
R .idea/webServers.xml
M CHANGELOG.md
M CMakeLists.txt
M INSTALL
M appveyor.yml
M cmake/DyninstConfig.cmake.in
M cmake/Modules/FindLibDwarf.cmake
M cmake/cap_arch_def.cmake
M cmake/packages.cmake
M cmake/platform_unix.cmake
M cmake/shared.cmake
M common/CMakeLists.txt
A common/docs/decoding_diagram.png
A common/docs/rose_structure.png
M common/h/Graph.h
A common/h/aarch32_opcode_autogen.h
A common/h/aarch32_sys_regs.h
M common/h/dyn_regs.h
M common/h/entryIDs.h
M common/src/Graph.C
M common/src/addrtranslate-sysv.C
A common/src/arch-aarch32.C
A common/src/arch-aarch32.h
M common/src/arch-x86.C
M common/src/arch-x86.h
M common/src/arch.h
M common/src/dyn_regs.C
M dataflowAPI/h/slicing.h
R dataflowAPI/rose/powerpcInstructionSemantics.h
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/DispatcherARM64.h
A dataflowAPI/rose/semantics/DispatcherPowerpc.C
A dataflowAPI/rose/semantics/DispatcherPowerpc.h
M dataflowAPI/rose/semantics/MemoryMap.C
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/Registers.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/rose/util/Message.C
M dataflowAPI/rose/util/PoolAllocator.h
M dataflowAPI/src/ABI.C
M dataflowAPI/src/AbslocInterface.C
M dataflowAPI/src/ExpressionConversionVisitor.C
M dataflowAPI/src/RoseImpl.C
M dataflowAPI/src/RoseInsnFactory.C
M dataflowAPI/src/SymEval.C
M dataflowAPI/src/SymbolicExpansion.C
M dataflowAPI/src/SymbolicExpansion.h
M dataflowAPI/src/convertOpcodes.C
M dataflowAPI/src/liveness.C
M dataflowAPI/src/slicing.C
M dataflowAPI/src/stackanalysis.C
M dwarf/CMakeLists.txt
M dwarf/h/dwarfExprParser.h
M dwarf/h/dwarfFrameParser.h
M dwarf/h/dwarfHandle.h
M dwarf/h/dwarfResult.h
M dwarf/src/dwarfExprParser.C
M dwarf/src/dwarfFrameParser.C
M dwarf/src/dwarfHandle.C
M dwarf/src/dwarfResult.C
M dynC_API/src/dynC.tab.C
M dyninstAPI/CMakeLists.txt
R dyninstAPI/doc/dyninstAPI.doc
A dyninstAPI/doc/dyninstAPI.docx
M dyninstAPI/doc/dyninstAPI.pdf
M dyninstAPI/h/BPatch.h
M dyninstAPI/h/BPatch_type.h
M dyninstAPI/src/BPatch_function.C
M dyninstAPI/src/BPatch_snippet.C
M dyninstAPI/src/BPatch_type.C
M dyninstAPI/src/Parsing.C
A dyninstAPI/src/RegisterConversion-aarch32.C
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
A dyninstAPI/src/Relocation/Widgets/CFWidget-aarch32.C
M dyninstAPI/src/Relocation/Widgets/CFWidget.h
M dyninstAPI/src/StackMod/StackAccess.C
M dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
M dyninstAPI/src/binaryEdit.h
A dyninstAPI/src/codegen-aarch32.C
A dyninstAPI/src/codegen-aarch32.h
M dyninstAPI/src/codegen-power.C
M dyninstAPI/src/codegen.h
M dyninstAPI/src/dynProcess.C
A dyninstAPI/src/emit-aarch32.h
M dyninstAPI/src/emit-x86.C
M dyninstAPI/src/image.C
A dyninstAPI/src/inst-aarch32.C
A dyninstAPI/src/inst-aarch32.h
M dyninstAPI/src/inst-x86.C
M dyninstAPI/src/legacy-instruction.h
A dyninstAPI/src/linux-aarch32.C
A dyninstAPI/src/linux-aarch32.h
M dyninstAPI/src/linux.h
A dyninstAPI/src/parse-aarch32.C
M dyninstAPI/src/pcEventHandler.C
M dyninstAPI/src/pcEventMuxer.C
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
A dyninstAPI/src/stackwalk-aarch32.C
M dyninstAPI_RT/src/RTlinux.c
M external/rose/powerpcInstructionEnum.h
M instructionAPI/CMakeLists.txt
A instructionAPI/ISA_ps/abs_advsimd
A instructionAPI/ISA_ps/adc
A instructionAPI/ISA_ps/adcs
A instructionAPI/ISA_ps/add_addsub_ext
A instructionAPI/ISA_ps/add_addsub_imm
A instructionAPI/ISA_ps/add_addsub_shift
A instructionAPI/ISA_ps/add_advsimd
A instructionAPI/ISA_ps/addhn_advsimd
A instructionAPI/ISA_ps/addp_advsimd_pair
A instructionAPI/ISA_ps/addp_advsimd_vec
A instructionAPI/ISA_ps/adds_addsub_ext
A instructionAPI/ISA_ps/adds_addsub_imm
A instructionAPI/ISA_ps/adds_addsub_shift
A instructionAPI/ISA_ps/addv_advsimd
A instructionAPI/ISA_ps/adr
A instructionAPI/ISA_ps/adrp
A instructionAPI/ISA_ps/aesd_advsimd
A instructionAPI/ISA_ps/aese_advsimd
A instructionAPI/ISA_ps/aesimc_advsimd
A instructionAPI/ISA_ps/aesmc_advsimd
A instructionAPI/ISA_ps/and_advsimd
A instructionAPI/ISA_ps/and_log_imm
A instructionAPI/ISA_ps/and_log_shift
A instructionAPI/ISA_ps/ands_log_imm
A instructionAPI/ISA_ps/ands_log_shift
A instructionAPI/ISA_ps/asr_asrv
A instructionAPI/ISA_ps/asr_sbfm
A instructionAPI/ISA_ps/asrv
A instructionAPI/ISA_ps/at_sys
A instructionAPI/ISA_ps/b_cond
A instructionAPI/ISA_ps/b_uncond
A instructionAPI/ISA_ps/bfi_bfm
A instructionAPI/ISA_ps/bfm
A instructionAPI/ISA_ps/bfxil_bfm
A instructionAPI/ISA_ps/bic_advsimd_imm
A instructionAPI/ISA_ps/bic_advsimd_reg
A instructionAPI/ISA_ps/bic_log_shift
A instructionAPI/ISA_ps/bics
A instructionAPI/ISA_ps/bif_advsimd
A instructionAPI/ISA_ps/bit_advsimd
A instructionAPI/ISA_ps/bl
A instructionAPI/ISA_ps/blr
A instructionAPI/ISA_ps/br
A instructionAPI/ISA_ps/brk
A instructionAPI/ISA_ps/bsl_advsimd
A instructionAPI/ISA_ps/cbnz
A instructionAPI/ISA_ps/cbz
A instructionAPI/ISA_ps/ccmn_imm
A instructionAPI/ISA_ps/ccmn_reg
A instructionAPI/ISA_ps/ccmp_imm
A instructionAPI/ISA_ps/ccmp_reg
A instructionAPI/ISA_ps/cinc_csinc
A instructionAPI/ISA_ps/cinv_csinv
A instructionAPI/ISA_ps/clrex
A instructionAPI/ISA_ps/cls_advsimd
A instructionAPI/ISA_ps/cls_int
A instructionAPI/ISA_ps/clz_advsimd
A instructionAPI/ISA_ps/clz_int
A instructionAPI/ISA_ps/cmeq_advsimd_reg
A instructionAPI/ISA_ps/cmeq_advsimd_zero
A instructionAPI/ISA_ps/cmge_advsimd_reg
A instructionAPI/ISA_ps/cmge_advsimd_zero
A instructionAPI/ISA_ps/cmgt_advsimd_reg
A instructionAPI/ISA_ps/cmgt_advsimd_zero
A instructionAPI/ISA_ps/cmhi_advsimd
A instructionAPI/ISA_ps/cmhs_advsimd
A instructionAPI/ISA_ps/cmle_advsimd
A instructionAPI/ISA_ps/cmlt_advsimd
A instructionAPI/ISA_ps/cmn_adds_addsub_ext
A instructionAPI/ISA_ps/cmn_adds_addsub_imm
A instructionAPI/ISA_ps/cmn_adds_addsub_shift
A instructionAPI/ISA_ps/cmp_subs_addsub_ext
A instructionAPI/ISA_ps/cmp_subs_addsub_imm
A instructionAPI/ISA_ps/cmp_subs_addsub_shift
A instructionAPI/ISA_ps/cmtst_advsimd
A instructionAPI/ISA_ps/cneg_csneg
A instructionAPI/ISA_ps/cnt_advsimd
A instructionAPI/ISA_ps/crc32
A instructionAPI/ISA_ps/crc32c
A instructionAPI/ISA_ps/csel
A instructionAPI/ISA_ps/cset_csinc
A instructionAPI/ISA_ps/csetm_csinv
A instructionAPI/ISA_ps/csinc
A instructionAPI/ISA_ps/csinv
A instructionAPI/ISA_ps/csneg
A instructionAPI/ISA_ps/dc_sys
A instructionAPI/ISA_ps/dcps1
A instructionAPI/ISA_ps/dcps2
A instructionAPI/ISA_ps/dcps3
A instructionAPI/ISA_ps/dmb
A instructionAPI/ISA_ps/drps
A instructionAPI/ISA_ps/dsb
A instructionAPI/ISA_ps/dup_advsimd_elt
A instructionAPI/ISA_ps/dup_advsimd_gen
A instructionAPI/ISA_ps/encodingindex
A instructionAPI/ISA_ps/enumerated-symbol-accounts
A instructionAPI/ISA_ps/eon
A instructionAPI/ISA_ps/eor_advsimd
A instructionAPI/ISA_ps/eor_log_imm
A instructionAPI/ISA_ps/eor_log_shift
A instructionAPI/ISA_ps/eret
A instructionAPI/ISA_ps/ext_advsimd
A instructionAPI/ISA_ps/extr
A instructionAPI/ISA_ps/fabd_advsimd
A instructionAPI/ISA_ps/fabs_advsimd
A instructionAPI/ISA_ps/fabs_float
A instructionAPI/ISA_ps/facge_advsimd
A instructionAPI/ISA_ps/facgt_advsimd
A instructionAPI/ISA_ps/fadd_advsimd
A instructionAPI/ISA_ps/fadd_float
A instructionAPI/ISA_ps/faddp_advsimd_pair
A instructionAPI/ISA_ps/faddp_advsimd_vec
A instructionAPI/ISA_ps/fccmp_float
A instructionAPI/ISA_ps/fccmpe_float
A instructionAPI/ISA_ps/fcmeq_advsimd_reg
A instructionAPI/ISA_ps/fcmeq_advsimd_zero
A instructionAPI/ISA_ps/fcmge_advsimd_reg
A instructionAPI/ISA_ps/fcmge_advsimd_zero
A instructionAPI/ISA_ps/fcmgt_advsimd_reg
A instructionAPI/ISA_ps/fcmgt_advsimd_zero
A instructionAPI/ISA_ps/fcmle_advsimd
A instructionAPI/ISA_ps/fcmlt_advsimd
A instructionAPI/ISA_ps/fcmp_float
A instructionAPI/ISA_ps/fcmpe_float
A instructionAPI/ISA_ps/fcsel_float
A instructionAPI/ISA_ps/fcvt_float
A instructionAPI/ISA_ps/fcvtas_advsimd
A instructionAPI/ISA_ps/fcvtas_float
A instructionAPI/ISA_ps/fcvtau_advsimd
A instructionAPI/ISA_ps/fcvtau_float
A instructionAPI/ISA_ps/fcvtl_advsimd
A instructionAPI/ISA_ps/fcvtms_advsimd
A instructionAPI/ISA_ps/fcvtms_float
A instructionAPI/ISA_ps/fcvtmu_advsimd
A instructionAPI/ISA_ps/fcvtmu_float
A instructionAPI/ISA_ps/fcvtn_advsimd
A instructionAPI/ISA_ps/fcvtns_advsimd
A instructionAPI/ISA_ps/fcvtns_float
A instructionAPI/ISA_ps/fcvtnu_advsimd
A instructionAPI/ISA_ps/fcvtnu_float
A instructionAPI/ISA_ps/fcvtps_advsimd
A instructionAPI/ISA_ps/fcvtps_float
A instructionAPI/ISA_ps/fcvtpu_advsimd
A instructionAPI/ISA_ps/fcvtpu_float
A instructionAPI/ISA_ps/fcvtxn_advsimd
A instructionAPI/ISA_ps/fcvtzs_advsimd_fix
A instructionAPI/ISA_ps/fcvtzs_advsimd_int
A instructionAPI/ISA_ps/fcvtzs_float_fix
A instructionAPI/ISA_ps/fcvtzs_float_int
A instructionAPI/ISA_ps/fcvtzu_advsimd_fix
A instructionAPI/ISA_ps/fcvtzu_advsimd_int
A instructionAPI/ISA_ps/fcvtzu_float_fix
A instructionAPI/ISA_ps/fcvtzu_float_int
A instructionAPI/ISA_ps/fdiv_advsimd
A instructionAPI/ISA_ps/fdiv_float
A instructionAPI/ISA_ps/fmadd_float
A instructionAPI/ISA_ps/fmax_advsimd
A instructionAPI/ISA_ps/fmax_float
A instructionAPI/ISA_ps/fmaxnm_advsimd
A instructionAPI/ISA_ps/fmaxnm_float
A instructionAPI/ISA_ps/fmaxnmp_advsimd_pair
A instructionAPI/ISA_ps/fmaxnmp_advsimd_vec
A instructionAPI/ISA_ps/fmaxnmv_advsimd
A instructionAPI/ISA_ps/fmaxp_advsimd_pair
A instructionAPI/ISA_ps/fmaxp_advsimd_vec
A instructionAPI/ISA_ps/fmaxv_advsimd
A instructionAPI/ISA_ps/fmin_advsimd
A instructionAPI/ISA_ps/fmin_float
A instructionAPI/ISA_ps/fminnm_advsimd
A instructionAPI/ISA_ps/fminnm_float
A instructionAPI/ISA_ps/fminnmp_advsimd_pair
A instructionAPI/ISA_ps/fminnmp_advsimd_vec
A instructionAPI/ISA_ps/fminnmv_advsimd
A instructionAPI/ISA_ps/fminp_advsimd_pair
A instructionAPI/ISA_ps/fminp_advsimd_vec
A instructionAPI/ISA_ps/fminv_advsimd
A instructionAPI/ISA_ps/fmla_advsimd_elt
A instructionAPI/ISA_ps/fmla_advsimd_vec
A instructionAPI/ISA_ps/fmls_advsimd_elt
A instructionAPI/ISA_ps/fmls_advsimd_vec
A instructionAPI/ISA_ps/fmov_advsimd
A instructionAPI/ISA_ps/fmov_float
A instructionAPI/ISA_ps/fmov_float_gen
A instructionAPI/ISA_ps/fmov_float_imm
A instructionAPI/ISA_ps/fmsub_float
A instructionAPI/ISA_ps/fmul_advsimd_elt
A instructionAPI/ISA_ps/fmul_advsimd_vec
A instructionAPI/ISA_ps/fmul_float
A instructionAPI/ISA_ps/fmulx_advsimd_elt
A instructionAPI/ISA_ps/fmulx_advsimd_vec
A instructionAPI/ISA_ps/fneg_advsimd
A instructionAPI/ISA_ps/fneg_float
A instructionAPI/ISA_ps/fnmadd_float
A instructionAPI/ISA_ps/fnmsub_float
A instructionAPI/ISA_ps/fnmul_float
A instructionAPI/ISA_ps/fpsimdindex
A instructionAPI/ISA_ps/frecpe_advsimd
A instructionAPI/ISA_ps/frecps_advsimd
A instructionAPI/ISA_ps/frecpx_advsimd
A instructionAPI/ISA_ps/frinta_advsimd
A instructionAPI/ISA_ps/frinta_float
A instructionAPI/ISA_ps/frinti_advsimd
A instructionAPI/ISA_ps/frinti_float
A instructionAPI/ISA_ps/frintm_advsimd
A instructionAPI/ISA_ps/frintm_float
A instructionAPI/ISA_ps/frintn_advsimd
A instructionAPI/ISA_ps/frintn_float
A instructionAPI/ISA_ps/frintp_advsimd
A instructionAPI/ISA_ps/frintp_float
A instructionAPI/ISA_ps/frintx_advsimd
A instructionAPI/ISA_ps/frintx_float
A instructionAPI/ISA_ps/frintz_advsimd
A instructionAPI/ISA_ps/frintz_float
A instructionAPI/ISA_ps/frsqrte_advsimd
A instructionAPI/ISA_ps/frsqrts_advsimd
A instructionAPI/ISA_ps/fsqrt_advsimd
A instructionAPI/ISA_ps/fsqrt_float
A instructionAPI/ISA_ps/fsub_advsimd
A instructionAPI/ISA_ps/fsub_float
A instructionAPI/ISA_ps/hint
A instructionAPI/ISA_ps/hlt
A instructionAPI/ISA_ps/hvc
A instructionAPI/ISA_ps/ic_sys
A instructionAPI/ISA_ps/index
A instructionAPI/ISA_ps/ins_advsimd_elt
A instructionAPI/ISA_ps/ins_advsimd_gen
A instructionAPI/ISA_ps/isb
A instructionAPI/ISA_ps/ld1_advsimd_mult
A instructionAPI/ISA_ps/ld1_advsimd_sngl
A instructionAPI/ISA_ps/ld1r_advsimd
A instructionAPI/ISA_ps/ld2_advsimd_mult
A instructionAPI/ISA_ps/ld2_advsimd_sngl
A instructionAPI/ISA_ps/ld2r_advsimd
A instructionAPI/ISA_ps/ld3_advsimd_mult
A instructionAPI/ISA_ps/ld3_advsimd_sngl
A instructionAPI/ISA_ps/ld3r_advsimd
A instructionAPI/ISA_ps/ld4_advsimd_mult
A instructionAPI/ISA_ps/ld4_advsimd_sngl
A instructionAPI/ISA_ps/ld4r_advsimd
A instructionAPI/ISA_ps/ldar
A instructionAPI/ISA_ps/ldarb
A instructionAPI/ISA_ps/ldarh
A instructionAPI/ISA_ps/ldaxp
A instructionAPI/ISA_ps/ldaxr
A instructionAPI/ISA_ps/ldaxrb
A instructionAPI/ISA_ps/ldaxrh
A instructionAPI/ISA_ps/ldnp_fpsimd
A instructionAPI/ISA_ps/ldnp_gen
A instructionAPI/ISA_ps/ldp_fpsimd
A instructionAPI/ISA_ps/ldp_gen
A instructionAPI/ISA_ps/ldpsw
A instructionAPI/ISA_ps/ldr_imm_fpsimd
A instructionAPI/ISA_ps/ldr_imm_gen
A instructionAPI/ISA_ps/ldr_lit_fpsimd
A instructionAPI/ISA_ps/ldr_lit_gen
A instructionAPI/ISA_ps/ldr_reg_fpsimd
A instructionAPI/ISA_ps/ldr_reg_gen
A instructionAPI/ISA_ps/ldrb_imm
A instructionAPI/ISA_ps/ldrb_reg
A instructionAPI/ISA_ps/ldrh_imm
A instructionAPI/ISA_ps/ldrh_reg
A instructionAPI/ISA_ps/ldrsb_imm
A instructionAPI/ISA_ps/ldrsb_reg
A instructionAPI/ISA_ps/ldrsh_imm
A instructionAPI/ISA_ps/ldrsh_reg
A instructionAPI/ISA_ps/ldrsw_imm
A instructionAPI/ISA_ps/ldrsw_lit
A instructionAPI/ISA_ps/ldrsw_reg
A instructionAPI/ISA_ps/ldtr
A instructionAPI/ISA_ps/ldtrb
A instructionAPI/ISA_ps/ldtrh
A instructionAPI/ISA_ps/ldtrsb
A instructionAPI/ISA_ps/ldtrsh
A instructionAPI/ISA_ps/ldtrsw
A instructionAPI/ISA_ps/ldur_fpsimd
A instructionAPI/ISA_ps/ldur_gen
A instructionAPI/ISA_ps/ldurb
A instructionAPI/ISA_ps/ldurh
A instructionAPI/ISA_ps/ldursb
A instructionAPI/ISA_ps/ldursh
A instructionAPI/ISA_ps/ldursw
A instructionAPI/ISA_ps/ldxp
A instructionAPI/ISA_ps/ldxr
A instructionAPI/ISA_ps/ldxrb
A instructionAPI/ISA_ps/ldxrh
A instructionAPI/ISA_ps/lsl_lslv
A instructionAPI/ISA_ps/lsl_ubfm
A instructionAPI/ISA_ps/lslv
A instructionAPI/ISA_ps/lsr_lsrv
A instructionAPI/ISA_ps/lsr_ubfm
A instructionAPI/ISA_ps/lsrv
A instructionAPI/ISA_ps/madd
A instructionAPI/ISA_ps/mla_advsimd_elt
A instructionAPI/ISA_ps/mla_advsimd_vec
A instructionAPI/ISA_ps/mls_advsimd_elt
A instructionAPI/ISA_ps/mls_advsimd_vec
A instructionAPI/ISA_ps/mneg_msub
A instructionAPI/ISA_ps/mov_add_addsub_imm
A instructionAPI/ISA_ps/mov_dup_advsimd_elt
A instructionAPI/ISA_ps/mov_ins_advsimd_elt
A instructionAPI/ISA_ps/mov_ins_advsimd_gen
A instructionAPI/ISA_ps/mov_movn
A instructionAPI/ISA_ps/mov_movz
A instructionAPI/ISA_ps/mov_orr_advsimd_reg
A instructionAPI/ISA_ps/mov_orr_log_imm
A instructionAPI/ISA_ps/mov_orr_log_shift
A instructionAPI/ISA_ps/mov_umov_advsimd
A instructionAPI/ISA_ps/movi_advsimd
A instructionAPI/ISA_ps/movk
A instructionAPI/ISA_ps/movn
A instructionAPI/ISA_ps/movz
A instructionAPI/ISA_ps/mrs
A instructionAPI/ISA_ps/msr_imm
A instructionAPI/ISA_ps/msr_reg
A instructionAPI/ISA_ps/msub
A instructionAPI/ISA_ps/mul_advsimd_elt
A instructionAPI/ISA_ps/mul_advsimd_vec
A instructionAPI/ISA_ps/mul_madd
A instructionAPI/ISA_ps/mvn_not_advsimd
A instructionAPI/ISA_ps/mvn_orn_log_shift
A instructionAPI/ISA_ps/mvni_advsimd
A instructionAPI/ISA_ps/neg_advsimd
A instructionAPI/ISA_ps/neg_sub_addsub_shift
A instructionAPI/ISA_ps/negs_subs_addsub_shift
A instructionAPI/ISA_ps/ngc_sbc
A instructionAPI/ISA_ps/ngcs_sbcs
A instructionAPI/ISA_ps/nop_hint
A instructionAPI/ISA_ps/not_advsimd
A instructionAPI/ISA_ps/orn_advsimd
A instructionAPI/ISA_ps/orn_log_shift
A instructionAPI/ISA_ps/orr_advsimd_imm
A instructionAPI/ISA_ps/orr_advsimd_reg
A instructionAPI/ISA_ps/orr_log_imm
A instructionAPI/ISA_ps/orr_log_shift
A instructionAPI/ISA_ps/permindex
A instructionAPI/ISA_ps/pmul_advsimd
A instructionAPI/ISA_ps/pmull_advsimd
A instructionAPI/ISA_ps/prfm_imm
A instructionAPI/ISA_ps/prfm_lit
A instructionAPI/ISA_ps/prfm_reg
A instructionAPI/ISA_ps/prfum
A instructionAPI/ISA_ps/raddhn_advsimd
A instructionAPI/ISA_ps/rbit_advsimd
A instructionAPI/ISA_ps/rbit_int
A instructionAPI/ISA_ps/ret
A instructionAPI/ISA_ps/rev
A instructionAPI/ISA_ps/rev16_advsimd
A instructionAPI/ISA_ps/rev16_int
A instructionAPI/ISA_ps/rev32_advsimd
A instructionAPI/ISA_ps/rev32_int
A instructionAPI/ISA_ps/rev64_advsimd
A instructionAPI/ISA_ps/ror_extr
A instructionAPI/ISA_ps/ror_rorv
A instructionAPI/ISA_ps/rorv
A instructionAPI/ISA_ps/rshrn_advsimd
A instructionAPI/ISA_ps/rsubhn_advsimd
A instructionAPI/ISA_ps/saba_advsimd
A instructionAPI/ISA_ps/sabal_advsimd
A instructionAPI/ISA_ps/sabd_advsimd
A instructionAPI/ISA_ps/sabdl_advsimd
A instructionAPI/ISA_ps/sadalp_advsimd
A instructionAPI/ISA_ps/saddl_advsimd
A instructionAPI/ISA_ps/saddlp_advsimd
A instructionAPI/ISA_ps/saddlv_advsimd
A instructionAPI/ISA_ps/saddw_advsimd
A instructionAPI/ISA_ps/sbc
A instructionAPI/ISA_ps/sbcs
A instructionAPI/ISA_ps/sbfiz_sbfm
A instructionAPI/ISA_ps/sbfm
A instructionAPI/ISA_ps/sbfx_sbfm
A instructionAPI/ISA_ps/scvtf_advsimd_fix
A instructionAPI/ISA_ps/scvtf_advsimd_int
A instructionAPI/ISA_ps/scvtf_float_fix
A instructionAPI/ISA_ps/scvtf_float_int
A instructionAPI/ISA_ps/sdiv
A instructionAPI/ISA_ps/sev_hint
A instructionAPI/ISA_ps/sevl_hint
A instructionAPI/ISA_ps/sha1c_advsimd
A instructionAPI/ISA_ps/sha1h_advsimd
A instructionAPI/ISA_ps/sha1m_advsimd
A instructionAPI/ISA_ps/sha1p_advsimd
A instructionAPI/ISA_ps/sha1su0_advsimd
A instructionAPI/ISA_ps/sha1su1_advsimd
A instructionAPI/ISA_ps/sha256h2_advsimd
A instructionAPI/ISA_ps/sha256h_advsimd
A instructionAPI/ISA_ps/sha256su0_advsimd
A instructionAPI/ISA_ps/sha256su1_advsimd
A instructionAPI/ISA_ps/shadd_advsimd
A instructionAPI/ISA_ps/shared_pseudocode
A instructionAPI/ISA_ps/shl_advsimd
A instructionAPI/ISA_ps/shll_advsimd
A instructionAPI/ISA_ps/shrn_advsimd
A instructionAPI/ISA_ps/shsub_advsimd
A instructionAPI/ISA_ps/sli_advsimd
A instructionAPI/ISA_ps/smaddl
A instructionAPI/ISA_ps/smax_advsimd
A instructionAPI/ISA_ps/smaxp_advsimd
A instructionAPI/ISA_ps/smaxv_advsimd
A instructionAPI/ISA_ps/smc
A instructionAPI/ISA_ps/smin_advsimd
A instructionAPI/ISA_ps/sminp_advsimd
A instructionAPI/ISA_ps/sminv_advsimd
A instructionAPI/ISA_ps/smlal_advsimd_elt
A instructionAPI/ISA_ps/smlal_advsimd_vec
A instructionAPI/ISA_ps/smlsl_advsimd_elt
A instructionAPI/ISA_ps/smlsl_advsimd_vec
A instructionAPI/ISA_ps/smnegl_smsubl
A instructionAPI/ISA_ps/smov_advsimd
A instructionAPI/ISA_ps/smsubl
A instructionAPI/ISA_ps/smulh
A instructionAPI/ISA_ps/smull_advsimd_elt
A instructionAPI/ISA_ps/smull_advsimd_vec
A instructionAPI/ISA_ps/smull_smaddl
A instructionAPI/ISA_ps/sqabs_advsimd
A instructionAPI/ISA_ps/sqadd_advsimd
A instructionAPI/ISA_ps/sqdmlal_advsimd_elt
A instructionAPI/ISA_ps/sqdmlal_advsimd_vec
A instructionAPI/ISA_ps/sqdmlsl_advsimd_elt
A instructionAPI/ISA_ps/sqdmlsl_advsimd_vec
A instructionAPI/ISA_ps/sqdmulh_advsimd_elt
A instructionAPI/ISA_ps/sqdmulh_advsimd_vec
A instructionAPI/ISA_ps/sqdmull_advsimd_elt
A instructionAPI/ISA_ps/sqdmull_advsimd_vec
A instructionAPI/ISA_ps/sqneg_advsimd
A instructionAPI/ISA_ps/sqrdmulh_advsimd_elt
A instructionAPI/ISA_ps/sqrdmulh_advsimd_vec
A instructionAPI/ISA_ps/sqrshl_advsimd
A instructionAPI/ISA_ps/sqrshrn_advsimd
A instructionAPI/ISA_ps/sqrshrun_advsimd
A instructionAPI/ISA_ps/sqshl_advsimd_imm
A instructionAPI/ISA_ps/sqshl_advsimd_reg
A instructionAPI/ISA_ps/sqshlu_advsimd
A instructionAPI/ISA_ps/sqshrn_advsimd
A instructionAPI/ISA_ps/sqshrun_advsimd
A instructionAPI/ISA_ps/sqsub_advsimd
A instructionAPI/ISA_ps/sqxtn_advsimd
A instructionAPI/ISA_ps/sqxtun_advsimd
A instructionAPI/ISA_ps/srhadd_advsimd
A instructionAPI/ISA_ps/sri_advsimd
A instructionAPI/ISA_ps/srshl_advsimd
A instructionAPI/ISA_ps/srshr_advsimd
A instructionAPI/ISA_ps/srsra_advsimd
A instructionAPI/ISA_ps/sshl_advsimd
A instructionAPI/ISA_ps/sshll_advsimd
A instructionAPI/ISA_ps/sshr_advsimd
A instructionAPI/ISA_ps/ssra_advsimd
A instructionAPI/ISA_ps/ssubl_advsimd
A instructionAPI/ISA_ps/ssubw_advsimd
A instructionAPI/ISA_ps/st1_advsimd_mult
A instructionAPI/ISA_ps/st1_advsimd_sngl
A instructionAPI/ISA_ps/st2_advsimd_mult
A instructionAPI/ISA_ps/st2_advsimd_sngl
A instructionAPI/ISA_ps/st3_advsimd_mult
A instructionAPI/ISA_ps/st3_advsimd_sngl
A instructionAPI/ISA_ps/st4_advsimd_mult
A instructionAPI/ISA_ps/st4_advsimd_sngl
A instructionAPI/ISA_ps/stlr
A instructionAPI/ISA_ps/stlrb
A instructionAPI/ISA_ps/stlrh
A instructionAPI/ISA_ps/stlxp
A instructionAPI/ISA_ps/stlxr
A instructionAPI/ISA_ps/stlxrb
A instructionAPI/ISA_ps/stlxrh
A instructionAPI/ISA_ps/stnp_fpsimd
A instructionAPI/ISA_ps/stnp_gen
A instructionAPI/ISA_ps/stp_fpsimd
A instructionAPI/ISA_ps/stp_gen
A instructionAPI/ISA_ps/str_imm_fpsimd
A instructionAPI/ISA_ps/str_imm_gen
A instructionAPI/ISA_ps/str_reg_fpsimd
A instructionAPI/ISA_ps/str_reg_gen
A instructionAPI/ISA_ps/strb_imm
A instructionAPI/ISA_ps/strb_reg
A instructionAPI/ISA_ps/strh_imm
A instructionAPI/ISA_ps/strh_reg
A instructionAPI/ISA_ps/sttr
A instructionAPI/ISA_ps/sttrb
A instructionAPI/ISA_ps/sttrh
A instructionAPI/ISA_ps/stur_fpsimd
A instructionAPI/ISA_ps/stur_gen
A instructionAPI/ISA_ps/sturb
A instructionAPI/ISA_ps/sturh
A instructionAPI/ISA_ps/stxp
A instructionAPI/ISA_ps/stxr
A instructionAPI/ISA_ps/stxrb
A instructionAPI/ISA_ps/stxrh
A instructionAPI/ISA_ps/sub_addsub_ext
A instructionAPI/ISA_ps/sub_addsub_imm
A instructionAPI/ISA_ps/sub_addsub_shift
A instructionAPI/ISA_ps/sub_advsimd
A instructionAPI/ISA_ps/subhn_advsimd
A instructionAPI/ISA_ps/subs_addsub_ext
A instructionAPI/ISA_ps/subs_addsub_imm
A instructionAPI/ISA_ps/subs_addsub_shift
A instructionAPI/ISA_ps/suqadd_advsimd
A instructionAPI/ISA_ps/svc
A instructionAPI/ISA_ps/sxtb_sbfm
A instructionAPI/ISA_ps/sxth_sbfm
A instructionAPI/ISA_ps/sxtl_sshll_advsimd
A instructionAPI/ISA_ps/sxtw_sbfm
A instructionAPI/ISA_ps/sys
A instructionAPI/ISA_ps/sysl
A instructionAPI/ISA_ps/tbl_advsimd
A instructionAPI/ISA_ps/tbnz
A instructionAPI/ISA_ps/tbx_advsimd
A instructionAPI/ISA_ps/tbz
A instructionAPI/ISA_ps/temp.py
A instructionAPI/ISA_ps/tlbi_sys
A instructionAPI/ISA_ps/trn1_advsimd
A instructionAPI/ISA_ps/trn2_advsimd
A instructionAPI/ISA_ps/tst_ands_log_imm
A instructionAPI/ISA_ps/tst_ands_log_shift
A instructionAPI/ISA_ps/uaba_advsimd
A instructionAPI/ISA_ps/uabal_advsimd
A instructionAPI/ISA_ps/uabd_advsimd
A instructionAPI/ISA_ps/uabdl_advsimd
A instructionAPI/ISA_ps/uadalp_advsimd
A instructionAPI/ISA_ps/uaddl_advsimd
A instructionAPI/ISA_ps/uaddlp_advsimd
A instructionAPI/ISA_ps/uaddlv_advsimd
A instructionAPI/ISA_ps/uaddw_advsimd
A instructionAPI/ISA_ps/ubfiz_ubfm
A instructionAPI/ISA_ps/ubfm
A instructionAPI/ISA_ps/ubfx_ubfm
A instructionAPI/ISA_ps/ucvtf_advsimd_fix
A instructionAPI/ISA_ps/ucvtf_advsimd_int
A instructionAPI/ISA_ps/ucvtf_float_fix
A instructionAPI/ISA_ps/ucvtf_float_int
A instructionAPI/ISA_ps/udiv
A instructionAPI/ISA_ps/uhadd_advsimd
A instructionAPI/ISA_ps/uhsub_advsimd
A instructionAPI/ISA_ps/umaddl
A instructionAPI/ISA_ps/umax_advsimd
A instructionAPI/ISA_ps/umaxp_advsimd
A instructionAPI/ISA_ps/umaxv_advsimd
A instructionAPI/ISA_ps/umin_advsimd
A instructionAPI/ISA_ps/uminp_advsimd
A instructionAPI/ISA_ps/uminv_advsimd
A instructionAPI/ISA_ps/umlal_advsimd_elt
A instructionAPI/ISA_ps/umlal_advsimd_vec
A instructionAPI/ISA_ps/umlsl_advsimd_elt
A instructionAPI/ISA_ps/umlsl_advsimd_vec
A instructionAPI/ISA_ps/umnegl_umsubl
A instructionAPI/ISA_ps/umov_advsimd
A instructionAPI/ISA_ps/umsubl
A instructionAPI/ISA_ps/umulh
A instructionAPI/ISA_ps/umull_advsimd_elt
A instructionAPI/ISA_ps/umull_advsimd_vec
A instructionAPI/ISA_ps/umull_umaddl
A instructionAPI/ISA_ps/uqadd_advsimd
A instructionAPI/ISA_ps/uqrshl_advsimd
A instructionAPI/ISA_ps/uqrshrn_advsimd
A instructionAPI/ISA_ps/uqshl_advsimd_imm
A instructionAPI/ISA_ps/uqshl_advsimd_reg
A instructionAPI/ISA_ps/uqshrn_advsimd
A instructionAPI/ISA_ps/uqsub_advsimd
A instructionAPI/ISA_ps/uqxtn_advsimd
A instructionAPI/ISA_ps/urecpe_advsimd
A instructionAPI/ISA_ps/urhadd_advsimd
A instructionAPI/ISA_ps/urshl_advsimd
A instructionAPI/ISA_ps/urshr_advsimd
A instructionAPI/ISA_ps/ursqrte_advsimd
A instructionAPI/ISA_ps/ursra_advsimd
A instructionAPI/ISA_ps/ushl_advsimd
A instructionAPI/ISA_ps/ushll_advsimd
A instructionAPI/ISA_ps/ushr_advsimd
A instructionAPI/ISA_ps/usqadd_advsimd
A instructionAPI/ISA_ps/usra_advsimd
A instructionAPI/ISA_ps/usubl_advsimd
A instructionAPI/ISA_ps/usubw_advsimd
A instructionAPI/ISA_ps/uxtb_ubfm
A instructionAPI/ISA_ps/uxth_ubfm
A instructionAPI/ISA_ps/uxtl_ushll_advsimd
A instructionAPI/ISA_ps/uzp1_advsimd
A instructionAPI/ISA_ps/uzp2_advsimd
A instructionAPI/ISA_ps/wfe_hint
A instructionAPI/ISA_ps/wfi_hint
A instructionAPI/ISA_ps/xtn_advsimd
A instructionAPI/ISA_ps/yield_hint
A instructionAPI/ISA_ps/zip1_advsimd
A instructionAPI/ISA_ps/zip2_advsimd
R instructionAPI/aarch64_manual_parser.py
A instructionAPI/aarch64_pseudocode_extractor.py
R instructionAPI/aarch64_sysreg_builder.py
A instructionAPI/arm_manual_parser.py
A instructionAPI/arm_sysreg_builder.py
M instructionAPI/doc/API/Instruction.tex
A instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/h/BinaryFunction.h
M instructionAPI/h/Dereference.h
M instructionAPI/h/Expression.h
M instructionAPI/h/Immediate.h
M instructionAPI/h/Instruction.h
M instructionAPI/h/InstructionAST.h
M instructionAPI/h/Operand.h
M instructionAPI/h/Operation.h
M instructionAPI/h/Register.h
M instructionAPI/h/Result.h
M instructionAPI/h/Visitor.h
A instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/Immediate.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionCategories.C
A instructionAPI/src/InstructionDecoder-aarch32.C
A instructionAPI/src/InstructionDecoder-aarch32.h
M instructionAPI/src/InstructionDecoder-aarch64.C
M instructionAPI/src/InstructionDecoder-aarch64.h
M instructionAPI/src/InstructionDecoder-power.C
M instructionAPI/src/InstructionDecoder-power.h
M instructionAPI/src/InstructionDecoder-x86.C
M instructionAPI/src/InstructionDecoder-x86.h
M instructionAPI/src/InstructionDecoderImpl.C
M instructionAPI/src/Operand.C
M instructionAPI/src/Operation.C
M instructionAPI/src/Register.C
A instructionAPI/src/aarch32_decoder_autogen.C
A instructionAPI/src/aarch32_decoder_autogen.h
M instructionAPI/src/aarch64_opcode_tables.C
M instructionAPI/src/power_opcode_tables.C
M parseAPI/CMakeLists.txt
M parseAPI/h/CodeObject.h
M parseAPI/h/CodeSource.h
M parseAPI/src/Block.C
M parseAPI/src/BoundFactCalculator.C
M parseAPI/src/BoundFactCalculator.h
M parseAPI/src/BoundFactData.C
M parseAPI/src/BoundFactData.h
M parseAPI/src/CodeObject.C
M parseAPI/src/CodeSource.C
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_IAPI.h
M parseAPI/src/IA_InstrucIter.C
A parseAPI/src/IA_aarch32.C
A parseAPI/src/IA_aarch32.h
M parseAPI/src/IA_aarch64.C
A parseAPI/src/IA_aarch64.h
R parseAPI/src/IA_aarch64Details.C
R parseAPI/src/IA_aarch64Details.h
R parseAPI/src/IA_platformDetails.h
R parseAPI/src/IA_platformDetailsFactory.C
M parseAPI/src/IA_power.C
M parseAPI/src/IA_power.h
R parseAPI/src/IA_powerDetails.C
R parseAPI/src/IA_powerDetails.h
M parseAPI/src/IA_x86.C
A parseAPI/src/IA_x86.h
R parseAPI/src/IA_x86Details.C
R parseAPI/src/IA_x86Details.h
M parseAPI/src/IndirectASTVisitor.C
M parseAPI/src/IndirectASTVisitor.h
M parseAPI/src/IndirectAnalyzer.C
M parseAPI/src/IndirectAnalyzer.h
A parseAPI/src/InstructionSource-aarch32.C
R parseAPI/src/InstructionSource-aarch64.C
R parseAPI/src/InstructionSource-power.C
R parseAPI/src/InstructionSource-x86.C
A parseAPI/src/JumpTableFormatPred.C
A parseAPI/src/JumpTableFormatPred.h
A parseAPI/src/JumpTableIndexPred.C
A parseAPI/src/JumpTableIndexPred.h
R parseAPI/src/JumpTablePred.C
R parseAPI/src/JumpTablePred.h
M parseAPI/src/ParseData.C
M parseAPI/src/ParseData.h
M parseAPI/src/Parser-speculative.C
M parseAPI/src/Parser.C
M parseAPI/src/Parser.h
M parseAPI/src/ParserDetails.C
M parseAPI/src/ParserDetails.h
A parseAPI/src/SymbolicExpression.C
A parseAPI/src/SymbolicExpression.h
M parseAPI/src/SymtabCodeSource.C
M patchAPI/src/PatchMgr.C
M proccontrol/src/linux.C
M proccontrol/src/process.C
M scripts/dynsysname
M stackwalk/CMakeLists.txt
M stackwalk/h/walker.h
A stackwalk/src/aarch32-swk.C
A stackwalk/src/aarch32-swk.h
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/dbgstepper-impl.h
M stackwalk/src/framestepper.C
A stackwalk/src/linux-aarch32-swk.C
M stackwalk/src/x86-swk.C
M symtabAPI/CMakeLists.txt
M symtabAPI/doc/A-Appendix.tex
M symtabAPI/h/Function.h
M symtabAPI/h/Module.h
M symtabAPI/h/Symtab.h
M symtabAPI/src/Function.C
M symtabAPI/src/LineInformation.C
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object-nt.C
M symtabAPI/src/Object-nt.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/Type.C
M symtabAPI/src/Variable.C
M symtabAPI/src/dwarfWalker.C
M symtabAPI/src/dwarfWalker.h
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElf.h
A symtabAPI/src/emitElfStatic-aarch32.C
M symtabAPI/src/parseDwarf.C
A symtabAPI/src/relocationEntry-elf-aarch32.C
Log Message:
-----------
Merge pull request #417 from rchyena/pr/aarch32
AArch32 ARM Parsing Support
Compare: https://github.com/dyninst/dyninst/compare/a15520050c84...b562b26ec735
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