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SIGARCH-MSG: January 2001 Digest of SIGARCH Messages
Attached is the SIGARCH mailing list digest for January 2001
(grep sigarch-jan01):
* Hot Chips Call for Contributions
* International Conference on Supercomputing (ICS) Call for Papers
* Maurice Wilkes Award Call for Nominations
* Middleware and Distributed Systems Workshop at PLDI Call for Papers
* Computer Architecture Evaluation using Commercial Workloads Workshop
at HPCA Call for Participation
* Removing yourself from SIGARCH mailing list
--Mark D. Hill
infodir_SIGARCH@acm.org
SIARCH Information Director
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Mark D. Hill Office 6373 CSS
Professor & Romnes Fellow Phone 608-262-2196
Computer Sciences Department Asstnt 608-265-3402
University of Wisconsin-Madison FAX 608-262-9777
1210 West Dayton Street E-mail markhill@cs.wisc.edu
Madison, WI 53706-1685 USA http://www.cs.wisc.edu/~markhill
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CALL FOR CONTRIBUTIONS
Hot Chips 13 A Symposium on High-Performance Chips
Stanford University,
Palo Alto, California
August 19-21, 2001
Since its beginning in 1989, Hot Chips has become one of the leading
conferences on microprocessors and related digital ICs. This tradition
continues with Hot Chips 13 to be held in August 2001. Contributions
are solicited in the areas listed below. The emphasis is on real
products and real technology. Participants will not be required to
prepare written papers; rather the proceedings consist of copies of the
slides shown during the presentations.
Proposals should consist of a title, an extended abstract (up to 3
pages), and the name, job title, organization, address, phone number,
fax number, and e-mail address of the presenter. You must advise us if
you have an identical, similar or overlapping submission pending at
another conference or for a journal. If this is a not-yet-announced
product, and you would like the submission kept confidential, please
indicate it; we will do our best to maintain confidentiality. Authors
will be notified of the status of their submission by late April 2001.
The program committee will consider such factors as performance,
novelty, advanced technology, significance, and commercial scope.
Topics of interest include:
* Microprocessors (RISC, CISC, and VLIW) * Special Function and
Low-Power Chips
* Chip Multiprocessors (CMP) * Systems-on-a-Chip
* Embedded Processors * On-Chip Communication and I/O
* Graphics and Multimedia Chips * Compilers and Binary Translators
* Digital Signal Processors * Operating System/Chip Interaction
* Network Processors * Benchmarking & Perf. Evaluation
* Network, Communication, and Bus Chips * Quantum and Molecular
Computing
* Wireless Communication Devices * Integrated MEMS systems
Submissions should be made by email to
hotchips-submissions@cs.berkeley.edu
in ASCII, PDF, or Postscript format.
Prof. John Kubiatowicz, E-mail: kubitron@cs.berkeley.edu
University of California, Berkeley Phone: (510) 643-6817
673 Soda Hall #1776 Fax: (510) 643-7352
Berkeley, CA 94720-1776, USA
Updates and further instructions can be found at:
http://www.hotchips.org
the official HOT CHIPS 13 website:
Sponsored by the Technical Committee on Microprocessors and
Microcomputers of the IEEE Computer Society
General Chair Program Committee Co-Chairs
Lily Jow Prof. John Kubiatowicz, U.C. Berkeley
Compaq Computer Corp Dr Andrew Wolfe, SONIC|blue
Check the HOT CHIPS 13 web page for updates: http://www.hotchips.org
Submitted bu Allen J. Baum <allen.baum@compaq.com>
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International Conference on Supercomputing
June 18-21, 2001. Sorrento, Italy
The ACM International Conference on Supercomputing is a forum for
engineers and scientists throughout the world to exchange ideas
and research results relating to high performance, distributed, and
supercomputing systems. ICS provides an established international
forum for the presentation of new research results on high performance
and parallel computing systems. Now in its 15th year, this premier
supercomputing conference will include invited talks, exhibits and special
sessions (tutorials and workshops, panels). Topics of the conference
include all aspects of research, development, and application of:
* Parallel high-performance systems including new experimental
and commercial systems
* Multithreaded and high performance computer architectures
* High performance and parallel embedded systems
* Operating systems and support software
* Parallel I/O
* Optimizing compilers
* Performance evaluation
* High performance Java
* Program development tools
* Numerical and non-numerical algorithms
* Computationally challenging applications.
Papers not exceeding 6,000 words (in pdf or postscript format) must be
submitted electronically as specified at the conference web site. Detailed
instructions for electronic submission procedures and important dates
will be posted on the conference web site (www.cib.cnr.na.it/ics01). For
any additional information regarding paper submission, please contact
the Program Chair Efstratios Gallopoulos (stratis@ceid.upatras.gr). The
paper submission deadline is February 1, 2001.
June 16-17 and 18 are reserved for workshops and tutorials in technically
appealing areas that are relevant to the Conference. Proposals for
such events are also solicited with this call. Additional details about
submission procedures and important dates will be posted on the conference
web site (www.cib.na.cnr/ics01).
For any additional information, please contact the General Chair Mario
Mango Furnari (mf@cib.na.cnr.it).
Submitted by Eduard Ayguade <eduard@ac.upc.es>.
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2001 ACM/SIGARCH MAURICE WILKES AWARD
Nominations for the 2001 ACM/SIGARCH Maurice Wilkes Award are
due March 1, 2001.
Nominators should submit a 1 to 2 pages description of why their
candidate is worthy of the Wilkes Award including (if possible)
a URL pointing to the home page of the candidate. Letter of
support are allowed, but not required.
The nominator should ensure that the candidate is eligible for
the award (must have started graduate school in computer science
and engineering NO EARLIER than 1981 or, if the candidate does not
have an advanced degree in computer science and engineering, must
have begun working in the computer field no earlier than 1981).
Nominations should be submitted (electronically) to a member of
the Awards Committee:
Jim Goodman (chair) - goodman@cs.wisc.edu
Mary Jane Irwin - mji@cse.psu.edu
Wen-mei Hwu - hwu@crhc.uiuc.edu
The recipient will be selected based on
"Outstanding contributions to computer architecture made by
an individual whose computer-related professional career
(graduate school or full-time employment) began no earlier
than 20 years prior to the time of nomination"
Previous recipients:
1998 - Wen-Mei Hwu
1999 - Guri Sohi
2000 - William J. Dally
The recipient of the Maurice Wilkes Award will receive a $2,500
prize and will be invited to accept the award at ISCA'2000 in
Goteborg, Sweden.
Submitted by Alan Berenbaum <adb@lucent.com>.
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Call for Papers
OM 2001
First ACM SIGPLAN Workshop on
Optimizations of Middleware and Distributed Systems
http://www.cs.wisc.edu/~bodik/om2001
in conjunction with:
ACM SIGPLAN PLDI 2001
Conference on Programming Language Design and Implementation
Snowbird, Utah, June 19, 2001
The purpose of the workshop is to bring together experts in
programming languages, distributed systems, and computer
architecture, and discuss how these fields can collaborate in
improving internet-era computer systems.
You are invited to submit a paper and give a presentation.
Deadline for submission is February 18. See details below.
Background:
Middleware software is an intelligent plumbing that underlies
distributed applications. In this workshop, the term 'middleware'
is intended to extend far beyond the recent technologies for
e-commerce applications. Roughly, it includes all systems software
that provides enabling services needed by a distributed application,
for example: connectivity software that allows multiple processes
interact across a network, Java virtual machines that execute these
communicating components, and operating systems and run-time
libraries that schedule parallel execution threads.
From the point of view of programming languages, middleware has a
number of unique characteristics. For instance, rather than
focusing on inter-procedural optimizations, the "optimizer" may need
to perform across-the-network program transformations involving
multiple communicating software components. Such an optimization
model introduces a new level of complexity for both language design
and the optimizer and calls for a synergistic approach of multiple
disciplines.
The goal of the workshop is to provide a forum for researchers and
practitioners in programming languages, computer architecture,
distributed systems, and databases that will allow exchange of ideas
and seed their collaboration.
Workshop topics:
The scope of OM 2001 includes, but is not limited to:
- Novel optimizations targeting middleware,
- Novel optimizations enabled by middleware,
- Scalable and reliable middleware architectures,
- Scalable virtual machines for middleware,
- QoS-preserving middleware
- Dynamic and adaptive optimization techniques for middleware,
- Optimizations of transaction management and load balancing,
- Tools for middleware application development,
- Garbage collection, multithreading and exception handling,
- Programming models, language support, and design patterns,
- XML and middleware,
- Verification and debugging of middleware,
- Profiling and tuning of middleware,
- Benchmarking and workload characterization of middleware,
- Novel O/S, networking, and hardware support for middleware,
- Real-world case studies of middleware-based applications.
Structure:
OM 2001 will include an invited talk, technical paper
presentations, and a discussion session. Attendance is open,
although enrollment will be capped at 80 people. Students are
encouraged to attend and may apply for support from the SIGPLAN
Conference Attendance Program (www.cs.pitt.edu/~soffa/caps.html),
especially if they have a paper accepted and also attend PLDI 2001.
Submission:
We invite you to participate in the workshop. Please submit a
100-200 word ASCII abstract and a 5000-word (or less) paper
(approximately 10 pages, typeset 10 point on 16 point, excluding
bibliography and figures). Email the submissions (in postscript or
pdf format) to bodik@cs.wisc.edu. The submissions must be received
on or before Feb 18, 2001.
Proceedings of the workshop will be published by SIGPLAN.
Important dates:
Submission deadline February 18, 2001
Notification of acceptance April 2, 2001
Final papers due May 7, 2001
Workshop June 19, 2001
Chairs:
General Chair: Vugranam C. Sreedhar, IBM T.J. Watson Research Center
sreedhar@watson.ibm.com, 914-784-7325
Program Chair: Rastislav Bodik, University of Wisconsin,
bodik@cs.wisc.edu, 608-262-1079
Program Committee:
Andrea Arpaci-Dusseau University of Wisconsin--Madison
Rastislav Bodik (chair) University of Wisconsin--Madison
Ron Cytron Washington University
Naranker Dulay Imperial College
Stephen Fink IBM T.J. Watson Research Center
Jim Larus Microsoft Research
Mikko Lipasti University of Wisconsin--Madison
Doug Lea SUNY Oswego
Silvano Maffeis SoftWired AG
Fabio Panzieri Universita' di Bologna
Jean-Bernard Stefani France Telecom R&D
Nalini Venkatasubramaniam University of California, Irvine
Submitted by Rastislav Bodik <bodik@cs.wisc.edu>.
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CALL FOR PARTICIPATION
Fourth Workshop on
Computer Architecture Evaluation using Commercial Workloads
http://iacoma.cs.uiuc.edu/caecw01/
Monterrey, Mexico
Jan. 21, 2001
Immediately precedes the
Symposium on High-Performance Computer Architecture (HPCA-7)
http://www.csl.cornell.edu/hpca7/
Sponsored by the IEEE Computer Society
Organized by:
Russell Clapp, IBM NUMA-Q
rclapp@us.ibm.com
Kimberly Keeton, Hewlett-Packard Laboratories
kkeeton@hpl.hp.com
Ashwini Nanda, IBM TJ Watson Research Center
ashwini@watson.ibm.com
Josep Torrellas, University of Illinois at Urbana-Champaign
torrella@cs.uiuc.edu
Building on the positive feedback enjoyed by the previous Workshops
on Computer Architecture Evaluation using Commercial Workloads, this
fourth workshop will again bring together researchers and practitioners
in computer architecture and commercial workloads from industry and
academia. In the course of one day, we will discuss work-in-progress
that utilizes commercial workloads for the evaluation of computer
architectures. By discussing this ongoing research, the workshop
will expose participants to the characteristics of commercial workload
behavior and provide an understanding of how commercial workloads
exercise computer systems.
The final program for the workshop is listed below. (For full
abstracts, please visit the workshop web page at
http://iacoma.cs.uiuc.edu/caecw01/.) The technical talk schedule is
organized to give plenty of time for audience participation. After
the technical presentations, we will hold a panel with a round-table
discussion on the topic "how do we benchmark the availability and
maintainability of commercial systems?"
There will be no printed proceedings for the workshop, since we
encourage the presentation of work-in-progress and research in early
stages. Copies of the foils used by the speakers will be distributed
to the attendees on CD-ROM only. If hardcopy is desired, attendees
are encouraged to visit the workshop website 1 week before the
workshop to download an electronic copy of the foils for printing.
Registration for the workshop will be handled through the HPCA
registration site (see http://www.csl.cornell.edu/hpca7/).
To be eligible for advance registration discounts, your registration
form and payment must be received by 5pm EST on January 5, 2001.
Registration fees are as follows:
Advanced Registration:
Member: $95
Non-Member: $130
Full-time Student: $50
Late Registration fees will be as follows:
Member: $120
Non-Member: $150
Full-time Student: $60
Please visit the registration website for more complete and up-to-date
registration information.
Technical Program
Session 1: Characterization and Modeling of Web-Driven Workloads
Performance Characterization of J2EE-based E-Commerce Systems
Xubin He, Qing Yang, Dept. of Electrical and Computer Engineering,
University of Rhode Island
An Internet Traffic Generator for Server Architecture Evaluation
Krishna Kant, Vijay Tewari and Ravi Iyer, Intel Corporation
Performance Impact of Multithreaded Java Server Applications
Yue Luo and Lizy K. John, Dept. of Electrical and Computer
Engineering, The University of Texas at Austin
Session 2: Characterizing I/O Behavior
Characterizing Data-Intensive Workloads on Modern Disk Arrays
Guillermo Alvarez, Kimberly Keeton, Erik Riedel, Mustafa Uysal,
Hewlett-Packard Laboratories
Characterization of I/O for TPC-C and TPC-H workloads
Don DeSota, IBM
Iterative Development of an I/O Workload Characterization
Zachary Kurmas, Ralph Becker-Szendy, and Kimberly Keeton,
HP Labs Storage Systems Program
Session 3: Processor Architecture Evaluation and Simulation
Walking Four Machines By The Shore
Anastassia Ailamaki, David J. DeWitt, and Mark D. Hill,
University of Wisconsin-Madison
Evaluation of TPC-H benchmark on Athlon based systems
Mike Clark, Ajaya Durg, Kevin Lienenbrugger and Lizy John,
Electrical and Computer Engineering Department, The University
of Texas at Austin
Statistical Simulation of Superscalar Architectures using Commercial
Workloads
Lieven Eeckhout and Koen De Bosschere, Dept. of Electronics and
Information Systems (ELIS), Ghent University
Session 4: Memory Nest Performance for Database Workloads
Impact of Database Scaling onRealistic DSS Workload Characteristics
on SMP Systems
Ramendra K. Sahoo, Krishnan Sugavanam, Ashwini K. Nanda,
IBM T.J. Watson Research Center
STiNG Revisited:Performance of Commercial Database Benchmarks on a
CC-NUMA Computer System
Russell M. Clapp, IBM
Panel Session:
How do we benchmark the availability and maintainability of large
commercial systems?
Submitted by Kimberly Keeton <kkeeton@hpl.hp.com>.
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Removing Yourself from SIGARCH Mailing List
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on the SIGARCH list (no forwarding), you can remove yourself with:
mail listserv@acm.org
with message body (not subject):
unsubscribe SIGARCH-MEMBERS
If your email address does *not* match, mail me at infodir_SIGARCH@acm.org,
and I will work to remove you from the list.
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