Re: [Gems-users] How to create a new Cache configuration with L3 Cache

[Greg Byrd <gbyrd@xxxxxxxx>]

Depends on what you want and what you're used to, I guess.  It's certainly the case that you can't just set a configuration flag to make this happen.  But it's not that difficult.

(1) Create components for the L2 and L3 caches, meaning write SLICC files for them.

(2) Build a custom network to connect all the components to switches.

(3) Figure out how to address the correct component when you have a cache miss.

If you look at the current CMP protocols, you should see code examples for all of the above.

...Greg

On Mon, Jun 13, 2011 at 5:27 PM, Hui Zhao <hzhao5@xxxxxxxxx> wrote:

Hello

    I want to create a cache configuration with private L1 caches, shared L2 cache by every 2 cores, and a shared L3 cache by all cores, and this is a single chip. Can anyone shed some light? I have seen former questions similar to this one, but nobody seems to know how.

 It seems to me to make cache configuration changes in GEMS is more complicated compared with in Simics, which is quite straight forward.

 

https://lists.cs.wisc.edu/archive/gems-users/2011-March/msg00024.shtml

 

Thanks

H.Z.

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