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Hi, everyone!
I got a strange problem for
Simics 3.0.31.
When I step simics one
instruction per core for a sparc multi-core simulation,
it never ends. And the strange thing is that for core0,
after it executes an
instruction cmp %o7, 0, %g0, the
next pc is set to 0x105cde4. And no instruction
in other cores modify the next pc of core0. However,
when I step for core0 again,
the instruction is executed at pc 0x10009c0, surprisingly not the next pc value of
last instruction!!!
So I wonder how simics set its
pc. Is it set to the next pc value of last
instruction? Any idea?
2010-10-13
Peter
Fang
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