Re: [Gems-users] Why two L2 caches in topology with a CMP protocol?

[Ikhwan Lee <ikhwan@xxxxxxxxxxxxxxx>]

If you don't set g_NUM_L2_BANKS, they default to g_NUM_PROCESSORS. In
your case, you have two L2 banks and each maps to different physical
memory space.

Ikhwan

On Mon, Apr 26, 2010 at 11:41 PM, lori zhuang <lorizhuang@xxxxxxxxx> wrote:
> List,
>      I simulated the protocol MOESI_CMP_directory with the following
> configuration, and I find two L2 caches(L2Cache-0 and L2Cache-1) in the
> topology print when I dump the ruby. I supposed it there should be only one
> L2 cache since CMP protocols share L2 cache. Any suggestion?
> configuration:
> protocol: MOESI_CMP_directory_dram
> g_NUM_PROCESSORS: 2
> g_PROCS_PER_CHIP: 2
> g_NUM_CHIPS: 1
> topology print:
> --- Begin Topology Print ---
> L2Cache-0 Network Latencies
>   L2Cache-0 -> L2Cache-1 net_lat: 9
>   L2Cache-0 -> L1Cache-0 net_lat: 9
>   L2Cache-0 -> L1Cache-1 net_lat: 9
>   L2Cache-0 -> Directory-0 net_lat: 9
>   L2Cache-0 -> Directory-1 net_lat: 9
> L2Cache-1 Network Latencies
>   L2Cache-1 -> L2Cache-0 net_lat: 9
>   L2Cache-1 -> L1Cache-0 net_lat: 9
>   L2Cache-1 -> L1Cache-1 net_lat: 9
>   L2Cache-1 -> Directory-0 net_lat: 9
>   L2Cache-1 -> Directory-1 net_lat: 9
>
> Thanks,
> lorizhuang
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