Hi,
I was wondering if it is possible to use MOESI_SMP_directory
protocol with fewer directory controllers than the number of
chips. The reason is that I am using the multi-chip configuration
to model large CMPs (>> 16 processors) and don't want to model
the same number of memory/directory controllers as processors.
I assume that I will have to re-define the mapping of addresses to
directory controllers - is that correct ? Anything else ?
By the way, I am using MOESI_SMP_directory because I need a
private L2 cache which other protocols do not have.
Thanks...
Stamatis
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