Re: [Gems-users] SPLASH2 Benchmarks : Assertion failure in Simics Processor

[John Criswell <criswell@xxxxxxxx>]

divya ramakrishnan wrote:
> Hi,
>
> I am trying to run SPLASH2 benchmarks on Ruby (not using OPAL) using 
> the MSI_MOSI_CMP-directory protocol. I am using GEMS 2.0 with Simics 
> 3.1. I get the following error once the benchmark starts executing.
> failed assertion 'm_active_requests[i].size == size' at fn int 
> SimicsProcessor::lookupRequest(Address, CacheRequestType, int) in 
> simics/SimicsProcessor.C:168
> failed assertion 'm_active_requests[i].size == size' at fn int 
> SimicsProcessor::lookupRequest(Address, CacheRequestType, int) in 
> simics/SimicsProcessor.C:168
I saw this problem as well, and here is what I figured out.

Simics can, for a single instruction, send multiple memory accesses to 
the same address.  GEMS checks for this in lookupRequest(), and when it 
does, it does a sanity check to see if the size of previous requests 
match the size of the current request.
What I saw happening is that SimicsProcessor::lookupRequest() saw an 
initial memory access of 4 bytes and a subsequent access of zero bytes.  
I saw this on a cmpxchg instruction, I believe, and figured it was an 
artifact of Simics.  I changed the assertion in lookupRequest() so that 
it triggers if the sizes don't match *and* the size is unequal to zero  
(in other words, multiple accesses are okay if subsequence sizes either 
match the original request size or are of size zero).
Can anyone confirm that this behavior is correct?

-- John Criswell

> It looks like the size of the requests dont match. Can someone help me 
> with this? I am running the benchmark on a x86 target and am not sure 
> if it is some problem due to that.
> Divya Ramakrishnan
>
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