[Gems-users] instructions in DataCache

[selcuk koyuncu <koyuncu7@xxxxxxxxx>]

 m studying on msi_mosi_cmp_dir protocol . 
  Is it possiable for an instruction to be in D-cache or for a data to be in I-Cache ?
  for example in [protocol]L1.sm file 
  for an  IFETCH request we first Check *Data_L1_Cache* to see if the instruction is in the wrong L1 cache.( and for a Data access we first check Inst_L1_Cache and write it back to L2 if we find it there) 
  
  
    // Mandatory Queue betweens Node's CPU and it's L1 caches
    in_port(mandatoryQueue_in, CacheMsg, mandatoryQueue, desc="...") {
      if (mandatoryQueue_in.isReady()) {
        peek(mandatoryQueue_in, CacheMsg) {
  
          // Check for data access to
 blocks in I-cache and ifetchs to blocks in D-cache
  
          if (in_msg.Type == CacheRequestType:IFETCH) {
            // ** INSTRUCTION ACCESS ***
  
            // Check to see if it is in the OTHER L1
            if (L1DcacheMemory.isTagPresent(in_msg.Address)) {
             // The block is in the wrong L1, put the request on the queue to the shared L2
              trigger(Event:L1_WriteBack, in_msg.Address);
            }
 
            if
 (L1IcacheMemory.isTagPresent(in_msg.Address)) { 
              // The tag matches for the L1, so the L1 asks the L2 for it.
             trigger(mandatory_request_type_to_event(in_msg.Type), in_msg.Address);
                 } else {
               // No room in the L1, so we need to make room in the L1
                trigger(Event:L1_Replacement,  L1IcacheMemory.cacheProbe(in_msg.Address));
              }
            }
          } else {
            // *** DATA ACCESS ***

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