Re: [Gems-users] question about LX_CACHE_NUM_SETS_BITS parameter

["Mike Marty" <mike.marty@xxxxxxxxx>]

If L1_CACHE_ASSOC is 4 and L1_CACHE_NUM_SETS_BITS is 8, then each L1 cache instance is 2^8 * 4 * 64 bytes

On Sun, Apr 20, 2008 at 1:26 PM, Konstantinos Aisopos <kaisopos@xxxxxxxxx> wrote:

hi all,

I have a quick question about some configuration parameters. I
simulate a MESI_SCMP protocol with 64 cores on one single chip.

my question is: if LX is L1 or L2 and we have these parameters:
LX_CACHE_ASSOC 4
LX_CACHE_NUM_SETS_BITS 8
do these parameters represent the "total LX cache capacity" or the
"per core LX cache capacity"?

in other words is the size of LX *per core*..
      4 * 2^16 = 256K entries => 256K * 64bytes/line = 16MB???
or.. (4 * 2^16) / 64 = 4K entries  => 4K * 64bytes/line = 256KB???

thanks,
-Kostas
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