Re: [Gems-users] Ruby Cache Features

[pana <panasa1@xxxxxxxxx>]

Thanks for reply. 
Now I understood something more about the architecture, but I can't find what I am searching for about protocol.

I looked at Slicc code to search an answer to those questions, but I found nothing:

- Promotion Policy? Is there a timer or somthing similar to schedule migration?
- Where the new data are written in?

Has someone any idea?

bye 
francesco

On 5/24/07, hongxia sun <sunhx.seraph@xxxxxxxxx> wrote:

Hi,

 

The code related withe cache memory is in GEMS/ruby/system/CacheMemory.h.

As I know, when the memory transition send to Ruby, the address is physical address.

Because ruby is a timing model, there is no real data transferring occurred. And Only the cache controller state machines change accordingly.

 

2007/5/23, pana <panasa1@xxxxxxxxx>:

Hi,

I use Gems/Ruby with the MOESI_CMP_NUCA protocol. I have 8 cpu on a single chip and a shared D-NUCA cache memory (tetris like clustered)
I need to know some features about the cache memory and the protocol but I didn't find them neither in documentation nor in the code.

cache:
- Is L2 a Direct Access memory?
- Are L2 addresses logical or physical?

protocol:
- Which is the Promotion Policy? i.e. How the data change bank inside the cache? and when?
- Where the new data are written in? In the local bank cluster?

greetings
Francesco

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