Hello,
I'm using Simics 3.0.23 and GEMS 1.4.(Protocol is MOESI_CMP_NUCA.)
Also I'm simulating two machines and connect them with ethernet link.
(Referred 4.9 in Simics User's Guide) One machine is used as web
server (with Apache installed) and the other is used as client. I want
to run SPECweb99 in those two machines. I'm using serengeti and
abisko.
I used no prefix in objects for the server machine, and used 'a2_'
prefix for the client machine. (So, for example, the name of ethernet
adapter in the server is hme0, and a2_hme0 in the client.) Using GEMS,
I want to measure only the server, not the client.
The problem is that simics generates segmentation fault error when I
use both ruby and opal. (When I use only ruby, it's ok.) I guess that
opal tries to access the wrong CPUs for the client machine. (Both
server and client have 8 processors for each, so there are total 16
processors in two machines. But, as I wrote above, I want to measure
only the server.)
The following is an output message in Simics.
===============================================================================
[simics3@hpc8 MOESI_CMP_NUCA]$ ./simics -stall scripts/8p-web99.simics
Checking out a license... done: academic license.
+----------------+ Copyright 1998-2006 by Virtutech, All Rights Reserved
| Virtutech | Version: Simics 3.0.23
| Simics | Build: 1366 Host: x86-linux
+----------------+
www.simics.com "Virtutech" and "Simics" are trademarks of Virtutech AB
Use of this software is subject to appropriate license.
Type 'copyright' for details on copyright.
Type 'help help' for info on the on-line documentation.
[cpu0 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[cpu1 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[cpu2 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[cpu3 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[cpu4 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[cpu5 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[cpu6 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[cpu7 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[a2_cpu0 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[a2_cpu1 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[a2_cpu2 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[a2_cpu3 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[a2_cpu4 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[a2_cpu5 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[a2_cpu6 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
[a2_cpu7 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable cache
line size.
Turning I-STC off and flushing old data
Turning D-STC off and flushing old data
The switch time will change to 1 cycles (for CPU-0) once all
processors have synchronized.
successful installation of the ruby timing model.
Queue registration cpu0
successful installation of the opal queue.
hfa_init_local done:
Ruby Timing Mode
Creating event queue...
Creating event queue done
Creating system...
Processors: 8
Creating system done
Ruby: ruby-opal link established. removing timing_model.
OpalInterface: installation successful.
Ruby initialization complete
pstate_t: warning: control register #0 == "(null)" has simics name "g0".
pstate_t: warning: control register #1 == "(null)" has simics name "g1".
pstate_t: warning: control register #2 == "(null)" has simics name "g2".
pstate_t: warning: control register #3 == "(null)" has simics name "g3".
pstate_t: warning: control register #4 == "(null)" has simics name "g4".
pstate_t: warning: control register #5 == "(null)" has simics name "g5".
pstate_t: warning: control register #6 == "(null)" has simics name "g6".
pstate_t: warning: control register #7 == "(null)" has simics name "g7".
pstate_t: warning: control register #8 == "(null)" has simics name "o0".
pstate_t: warning: control register #9 == "(null)" has simics name "o1".
pstate_t: warning: control register #10 == "(null)" has simics name "o2".
pstate_t: warning: control register #11 == "(null)" has simics name "o3".
pstate_t: warning: control register #12 == "(null)" has simics name "o4".
pstate_t: warning: control register #13 == "(null)" has simics name "o5".
pstate_t: warning: control register #14 == "(null)" has simics name "o6".
pstate_t: warning: control register #15 == "(null)" has simics name "o7".
pstate_t: warning: control register #16 == "(null)" has simics name "l0".
pstate_t: warning: control register #17 == "(null)" has simics name "l1".
pstate_t: warning: control register #18 == "(null)" has simics name "l2".
pstate_t: warning: control register #19 == "(null)" has simics name "l3".
pstate_t: warning: control register #20 == "(null)" has simics name "l4".
pstate_t: warning: control register #21 == "(null)" has simics name "l5".
pstate_t: warning: control register #22 == "(null)" has simics name "l6".
pstate_t: warning: control register #23 == "(null)" has simics name "l7".
pstate_t: warning: control register #24 == "(null)" has simics name "i0".
pstate_t: warning: control register #25 == "(null)" has simics name "i1".
pstate_t: warning: control register #26 == "(null)" has simics name "i2".
pstate_t: warning: control register #27 == "(null)" has simics name "i3".
pstate_t: warning: control register #28 == "(null)" has simics name "i4".
pstate_t: warning: control register #29 == "(null)" has simics name "i5".
pstate_t: warning: control register #30 == "(null)" has simics name "i6".
pstate_t: warning: control register #31 == "(null)" has simics name "i7".
pstate_t: warning: control register #43 == "(null)" has simics name "stick".
pstate_t: warning: control register #44 == "(null)" has simics name
"stick_cmpr".
pstate_t: warning: control register #96 == "(null)" has simics name "softint".
pstate_t: warning: control register #97 == "(null)" has simics name
"safari_config".
pstate_t: warning: control register #98 == "(null)" has simics name
"safari_address".
pstate_t: warning: control register #99 == "(null)" has simics name
"ecache_error_enable".
pstate_t: warning: control register #100 == "(null)" has simics name
"asynchronous_fault_status".
pstate_t: warning: control register #101 == "(null)" has simics name
"asynchronous_fault_address".
pstate_t: warning: control register #102 == "(null)" has simics name
"out_intr_data0".
pstate_t: warning: control register #103 == "(null)" has simics name
"out_intr_data1".
pstate_t: warning: control register #104 == "(null)" has simics name
"out_intr_data2".
pstate_t: warning: control register #105 == "(null)" has simics name
"out_intr_data3".
pstate_t: warning: control register #106 == "(null)" has simics name
"out_intr_data4".
Ruby: ruby-opal link established. removing timing_model.
opalinterface: doing notify callback
Opal: opal-ruby link established.
OpalInterface: installation successful.
[0] PC 0x1049748 NPC 0x104974c ctx 0x0
[1] PC 0x1049790 NPC 0x1049794 ctx 0x0
[2] PC 0x1039950 NPC 0x1039954 ctx 0x0
[3] PC 0x1049750 NPC 0x1049774 ctx 0x0
[4] PC 0x1049780 NPC 0x1049784 ctx 0x0
[5] PC 0x1039984 NPC 0x1039988 ctx 0x0
[6] PC 0x1048450 NPC 0x1049d30 ctx 0x0
[7] PC 0x1048458 NPC 0x10483a8 ctx 0x0
[8] PC 0x10483d4 NPC 0x10483f0 ctx 0x0
[9] PC 0x1039988 NPC 0x103998c ctx 0x0
[10] PC 0x10497a0 NPC 0x10497a4 ctx 0x0
[11] PC 0x1049858 NPC 0x1048404 ctx 0x0
[12] PC 0x1049d30 NPC 0x1049d34 ctx 0x0
[13] PC 0x1039990 NPC 0x1039994 ctx 0x0
[14] PC 0x10497a0 NPC 0x10497a4 ctx 0x0
[15] PC 0x104974c NPC 0x1049750 ctx 0x0
Segmentation fault (SIGSEGV) in main thread
The simulation state has been corrupted. Simulation cannot continue.
Please restart Simics.
Starting command line. (May have skipped commands in script files.)
[a2_cpu7] v:0x000000000104974c p:0x00802c4974c bl,pn %icc, 0x1049774
simics>
===============================================================================
Thank you in advance!
-Baiksong
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