Re: [Gems-users] non-cacheable memory

[Mike Marty <mikem@xxxxxxxxxxx>]

> If you are not interested in modeling the memory system affects of issuing
> a request to memory, possibly incurring interconnect delays and etc., then
> sure, return a fixed number of stall cycles to Simics
>

This actually won't work.  You first need to stall Simics, then after the
stall elapses, Simics will ask again if it can proceed and you need to
then return a stall of 0.