Re: [Gems-users] fifo buffer


Date: Mon, 22 Jan 2007 13:23:16 -0600 (CST)
From: Mike Marty <mikem@xxxxxxxxxxx>
Subject: Re: [Gems-users] fifo buffer
I don't know either.  I think that somehow a line was removed from this
released file.  I would add this line to fix that file:

ext_node:Directory:1 int_node:2 link_latency:40 bw_multiplier:10

Sorry for the confusion.

--Mike

> Thanks for your reply, Mike. But I don't see why there is no DIR-1
> connection in NUCA_Procs-2_ProcsPerChip-2_L2Banks-2_Memories-2.txt.
>
> processors:2
> procs_per_chip:2
> L2banks:2
> memories:2
> bw_unit:1000
>
> ext_node:L1Cache:0 int_node:0 link_latency:1 bw_multiplier:64
> ext_node:L2Cache:0 int_node:0 link_latency:1 bw_multiplier:64
> ext_node:L1Cache:1 int_node:1 link_latency:1 bw_multiplier:64
> ext_node:L2Cache:1 int_node:1 link_latency:1 bw_multiplier:64
> ext_node:Directory:0 int_node:2 link_latency:40 bw_multiplier:10
> int_node:0 int_node:2 link_latency:40 bw_multiplier:16
> int_node:1 int_node:2 link_latency:40 bw_multiplier:16
>
>
> Thanks,
>
> Dave
>
> ----- Original Message ----
> From: Mike Marty <mikem@xxxxxxxxxxx>
> To: Gems Users <gems-users@xxxxxxxxxxx>
> Sent: Sunday, January 21, 2007 7:59:27 AM
> Subject: Re: [Gems-users] fifo buffer
>
> > Thanks for your reply, Mike. I've looked at the Ruby
> > network code. My current configuration is a
> > 2-processor SMP system w/ SIMPLE_NETWORK
> > (g_CACHE_DESIGN: NUCA). Does this mean that the
> > NUCA_Procs-2_ProcsPerChip-1_L2Banks-2_Memories-2.txt
> > file is used for network configuration? Or is there
> > some other configuration file for SIMPLE_NETWORK?
> >
>
> To use a network file, use the FILE_SPECIFIED topology.
>
> > Could you please tell me the format of the network
> > code? For example, in
> > NUCA_Procs-2_ProcsPerChip-1_L2Banks-2_Memories-2.txt,
> > I understand that L1-0, L2-0, DIR-0 are connected to
> > link 0 and L1-1, L2-1, DIR-1 are connected to link 1.
> > Also, link 0 and link 1 are connected. Am I right? But
> > I don't understand why there is no DIR-1 connection in
> > NUCA_Procs-2_ProcsPerChip-2_L2Banks-2_Memories-2.txt.
> >
>
> There is both a Directory-0 and Directory-1 in that file:
>
> processors:2
> procs_per_chip:1
> L2banks:2
> memories:2
> bw_unit:1000
>
> ext_node:L1Cache:0 int_node:0 link_latency:1 bw_multiplier:64
> ext_node:L2Cache:0 int_node:0 link_latency:1 bw_multiplier:64
> ext_node:Directory:0 int_node:0 link_latency:40 bw_multiplier:10
> int_node:0 int_node:1 link_latency:40 bw_multiplier:16
>
> ext_node:L1Cache:1 int_node:1 link_latency:1 bw_multiplier:64
> ext_node:L2Cache:1 int_node:1 link_latency:1 bw_multiplier:64
> ext_node:Directory:1 int_node:1 link_latency:40 bw_multiplier:10
>
>
> > The MessageBuffers in *.sm files are created based on
> > the physical links in network code, right? If so, to
> > create a fifo buffer, I should add physical links in
> > network code and then create MessageBuffer in *.sm
> > file, right?
> >
>
> Yes, each link has a PerfectSwitch and a Throttle.  Each of these
> components includes MessageBuffers.
>
> There are many ways to connect controllers together without using the
> default network links.  One way is to extend the network code.  Another
> way is to implement a special class that extends Consumer.  You can then
> hook up your controllers to instatiations of this class that generates
> wakeups to the controllers (see TimerTable.C for an example).  This is one
> way to implement your own messaging.
>
> --Mike
>
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