Re: [Gems-users] Help in DirRequestFromL2Cache -> requestToDir

["Mike Marty" <mike.marty@xxxxxxxxx>]

On Dec 9, 2007 2:06 AM, Tushar Krishna (tkrishna@xxxxxxxxxxxxx) <tkrishna@xxxxxxxxxxxxx> wrote:

Hi,

I am trying to track the memory request as it goes from L2 to the Memory/Directory and back as I'm trying to implement a prefetch unit at L2.
When the cache line request message is sent from the L2 Cache to the Memory/Directory, I see that it is enquued in the m_L2Cache_DirRequestFromL2Cache_vec buffer.

But the Directory_Wakeup looks at the m_Directory_requestToDir_vec buffer.

Where does the transfer from m_L2Cache_DirRequestFromL2Cache_vec to m_Directory_requestToDir_vec buffer take place?
Similarly when the addr is sent back.

Through the Ruby interconnection network.

Can the entire address traversal be tracked?

You can enable debugging flags in the network if you want, but this is really fine-grained detail.

I modified the Address class to have a private member prefetch_bit so that as the address moves on, its status as a prefetch address or a normal miss stays with it so that when it returns back to L2, I can stop the call back to L1...

I would perhaps add a Prefetch bit to the RequestMsg. 

Am I trying something too elaborate here for the prefetch?
I am using the MSI_MOSI_CMP_bcast protocol which requires inclusion. So would an extra request (for prefetch) not being allowed to go back to L1 create problems?

You should be able to initiate an L2->Memory prefetch without the L1's knowledge.

--Mike