Re: [Gems-users] Memory bus bandwidth

[Yasuko Watanabe <watanabe@xxxxxxxxxxx>]

Hi Lei:

You need to have two switches between L2 and Directory in order to
correctly measure memory bandwidth.  This is because a Throttle object
that controls bandwidth is attached only at an output port of a switch.
In addition, GEMS currently assigns same bandwidth to all links between
two switches, which may be a limitation if you want to use higher
bandwidth to the link from Directory to L2 (because there are more reads
than writes).

For instance, if you have one L2 bank and one Directory with 4B/cycle
memory bandwidth, the following is how to set up a network file using file
specified network (assuming g_endpoint_bandwidth is 1000):

ext_node:L2Cache:0 int_node:0 link_latency:1 bw_multiplier:64
ext_node:Directory:0 int_node:1 link_latency:1 bw_multiplier:64
int_node:0 int_node:1 link_latency:5 bw_multiplier:2

This allocates 2B/cycle bandwidth to each direction of off-chip link,
creating a total of 4B/cycle memory bandwidth.  The link bandwidth
utilization for switch (a.k.a. int_note) 0 in stats file is the outward
utilization, whereas the inward link utilization is measured at switch 1.

Another example is two L2 banks, two Directories, and 4B/cycle memory
bandwidth.  You can have either one memory channel or two.  This is the
two-channel case.

ext_node:L2Cache:0 int_node:0 link_latency:1 bw_multiplier:64
ext_node:L2Cache:1 int_node:1 link_latency:1 bw_multiplier:64
ext_node:Directory:0 int_node:2 link_latency:1 bw_multiplier:64
ext_node:Directory:1 int_node:3 link_latency:1 bw_multiplier:64
int_node:0 int_node:2 link_latency:5 bw_multiplier:1
int_node:1 int_node:3 link_latency:5 bw_multiplier:1

Hope this helps.

Yasuko


On Wed, 25 Apr 2007, Lei Yang wrote:

> Dear List,
>
> I've got a very quick question. In Ruby, how do I know the memory bus bandwidth (or you can call it front bus bandwidth)? Is it decided by the bw_unit and the bw_multiplier between processor node and the directory? I got some information on network link bandwidth from this discussion: https://lists.cs.wisc.edu/archive/gems-users/2006-November/msg00048.shtml .
>
> So in the following network configuration file, is the memory bus bandwidth 1000*10/1000 = 10 byte/cycle? Also, is the memory bus frequency the same with CPU frequency or is it configurable?
>
> ruby/network/simple/Network_Files/NUCA_Procs-2_ProcsPerChip-1_L2Banks-2_Memories-2.txt
>
> processors:2
> procs_per_chip:1
> L2banks:2
> memories:2
> bw_unit:1000
>
> ext_node:L1Cache:0 int_node:0 link_latency:1 bw_multiplier:64
> ext_node:L2Cache:0 int_node:0 link_latency:1 bw_multiplier:64
> ext_node:Directory:0 int_node:0 link_latency:2 bw_multiplier:10
> int_node:0 int_node:1 link_latency:5 bw_multiplier:16
>
> ext_node:L1Cache:1 int_node:1 link_latency:1 bw_multiplier:64
> ext_node:L2Cache:1 int_node:1 link_latency:1 bw_multiplier:64
> ext_node:Directory:1 int_node:1 link_latency:2 bw_multiplier:10
>
> Thanks as always!
>
> Lei