[Gems-users] Extending Ruby

["Dave Z." <zhu_dave@xxxxxxxxx>]

Hello All,

I'd like to modify the way the L1/L2 cache requests
are handled in MOESI_SMP_hammer. For example, I'd like
to add new functionalities on certain transitions. So,
I'm wondering if modifying MOESI_SMP_hammer-cache.sm
(actions and transitions) will be enough. Or do I need
to define new objects and put them in ruby/system
(just like the DemoPrefetcher example in the slides)?

Also, if I add a new controller to the system rather
than modifying the original code, how will I introduce
the new controller to the system? Will
MOESI_SMP_hammer-NEWCONTROLLER.sm be enough?

I'd like to get the big picture of how the memory
model works. For example, when data is brought from
the memory, what components are involved. Only the
cache controller? How about the Sequencer? What is the
responsibility of the Sequencer? When is
MOESI_SMP_hammer-dir.sm used?

Finally, is it possible to make data transfers between
processors? Is there something like
processor0.L2cacheMemory[address] =
processor1.L2cacheMemory[address]? How can I obtain
the machine id's of other processors in the system?

Thank you very much!