Re: [Gems-users] Generated files in ruby

[Dan Gibson <degibson@xxxxxxxx>]

These files are generated directly from the protocol specification via 
the SLICC utility.
The files in $GEMS/protocols are used to specify protocol behaviour. The 
SLICC compiler reads these specifications and produces the 
generated/[protocol] directory which is used in the actual simulation.
The reason why you're not finding separate files for the L1's and L2's 
is that under the "SMP" protocols, the caches use a single controller 
for coherence. Try one of the "CMP" protocols and you will find separate 
L1 and L2 controllers.
Regards,
Dan Gibson


Lei Yang wrote:
> Dear list,
>  
> In gems/ruby/generated, there are a lot of generated C and h files for 
> a certain protocol, say MOSI_SMP_bcast. I wonder how these files are 
> generated and what are the source files. For example, in 
> L1Cache_Entry.C, class 'L1Cache_Entry' inherits from 
> 'AbstractCacheEntry', which is in turn, defined in 
> ruby/slicc_interface/AbstractCacheEntry.h . However, as I understand 
> the MOSI_SMP_bcast protocol, in addition to L1I, L1D cache, each 
> processor also owns a unified L2 cache. But there is no 
> L2Cache_Entry.C/h file in ruby/generated. Since I want to do some 
> modification to the L2 cache architecture, I need to modify the 
> L2Cache_Entry class, if presents. More importantly I want to 
> understand how these files are automatically generated, because in 
> MOSI_SMP_bcast-cache.sm I can only see these lines related to 
> L1Cache_Entry and L2Cache_Entry:
>  
> CacheMemory L1IcacheMemory, template_hack="<L1Cache_Entry>", 
> constructor_hack='L1_CACHE_NUM_SETS_BITS,L1_CACHE_ASSOC,MachineType_L1Cache,int_to_string(i)+"_L1I"', 
> abstract_chip_ptr="true";
>   CacheMemory L1DcacheMemory, template_hack="<L1Cache_Entry>", 
> constructor_hack='L1_CACHE_NUM_SETS_BITS,L1_CACHE_ASSOC,MachineType_L1Cache,int_to_string(i)+"_L1D"', 
> abstract_chip_ptr="true";
>   CacheMemory L2cacheMemory,  template_hack="<L1Cache_Entry>", 
> constructor_hack='L2_CACHE_NUM_SETS_BITS,L2_CACHE_ASSOC,MachineType_L1Cache,int_to_string(i)+"_L2"', 
> abstract_chip_ptr="true";
>  
> Your help will be greatly appreciated!!
>  
> Thanks,
> Lei
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